Why there is a requirement of adc_model.v in usrp2?

GNU Radio
1

Hi,

I am working on my college project (usrp2). I am trying to analyze some
of
the FPGA codes and I came across a code for adc i.e. adc_model.v . (
/usrp2/models). My question is if I am using an external ADC (LTC 2284)
then
why is it required to design a model for adc?

pls note:- I am a new bee in usrp2. Sorry for posting such a silly
question
:confused:

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2

On Wed, 2010-12-29 at 21:06 -0800, anirudh2059. wrote:

Hi,

I am working on my college project (usrp2). I am trying to analyze some of
the FPGA codes and I came across a code for adc i.e. adc_model.v . (
/usrp2/models). My question is if I am using an external ADC (LTC 2284) then
why is it required to design a model for adc?

pls note:- I am a new bee in usrp2. Sorry for posting such a silly question
:confused:

nick@crapshoot:~/ettus/fpga$ grep “adc_model” * -r
usrp2/models/adc_model.v:module adc_model
usrp2/models/adc_model.v:endmodule // adc_model
usrp2/top/single_u2_sim/single_u2_sim.v: adc_model adc_model

It’s only instantiated in single_u2_sim. It’s not used in the USRP2
FPGA.