Why 4 ADC's?

Hello,

I have a conceptual question about the USRP. Why are there 4 A/D
converters? Is it only for flexibility reasons, or can you acheive
double the sampling rate by clocking two of them 180 degrees of from
each other and interleaving the resulting data?

Also, it looks to me like the default configuration uses two separate
A/D’s for complex sampling. (A/D0 and A/D1 go to DDC0’s I and Q
inputs, respectively) If the A/D’s are synchronized, won’t they always
produce the same (or very similar) data? If so, what’s the point of
using two at once?

Thanks,
Ian L.


My PGP Public Key:
http://www.scrapshark.com/pubkey.txt

Johnathan-

The FPGA DDC logic uses a single but complex mixer to do frequency
conversion of the signal from the ADCs. That is, it treats the data
from Vin-A and Vin-B as a complex number in I and Q format, and
multiplies this complex number by a complex sinusoid of a configurable
frequency. This is very different from having two mixers.

Yes thanks for that correction. That’s accurate for RFX2400. For the
LFRX Vin-A and
Vin-B are treated as separate RF inputs and not a combined I-Q data set.

-Jeff

Johnathan-

I assume this also true for the BasicRX daughterboard? (Doesn’t do
downconversion, but does do analog multiplication to get I and Q?)

Almost. The boards don’t do anything with the signal, but have separate
I and Q inputs that go to the ADCs as is.

On the FPGA, however, there are digital mixers that you can use to
convert a center frequency down to baseband, so you get a complex I and
Q signal out of that, even if you only supply a signal to the I input.
That is what is actually happening when you “tune” a BasicRX or LFRX board.

I think the OP is confused at what “signal processing” is happening on
the RF
daughterboard. Although some recent posts have said “none”, there
actually is some
– filters to separate the I and Q signals which were summed at the
point of original
transmission to make a single airwave.

This is why the two ADCs are actually sampling separate, different
signals, even
though their sampling rate clocks are synchronized.

-Jeff

Jeff B. wrote:

The LFRX has two separate antenna inputs, supplied to Vin-A and
Vin-B. These are not I-Q data. USRP board FPGA logic would apply
one mixer or two (30 MHz or less).

[…]

The RFX2400 mixes with a 2.4 GHz osc and creates one set of I-Q 65
MHz range signals, +/-I on Vin-A and +/-Q on Vin-B. To get baseband
signals, the logic has to apply two mixers.

The FPGA DDC logic uses a single but complex mixer to do frequency
conversion of the signal from the ADCs. That is, it treats the data
from Vin-A and Vin-B as a complex number in I and Q format, and
multiplies this complex number by a complex sinusoid of a configurable
frequency. This is very different from having two mixers.


Johnathan C.
Corgan Enterprises LLC
http://corganenterprises.com

The BasicRX daughterboard doesn’t do anything signal processing, with
the exception of passing the signal through some transformers. It has
two separate I and Q inputs, which are passed down to the USRP, where
all the signal processing is actually done.

-Roshan

On Thu, Jul 19, 2007 at 06:30:57AM -0700, Johnathan C. wrote:

signals, the logic has to apply two mixers.

The FPGA DDC logic uses a single but complex mixer to do frequency
conversion of the signal from the ADCs. That is, it treats the data
from Vin-A and Vin-B as a complex number in I and Q format, and
multiplies this complex number by a complex sinusoid of a configurable
frequency. This is very different from having two mixers.

In fact the routing from the ADCs to the inputs of the DDCs is
controlled by the input mux in the FPGA. You can route any ADC
into any DDC input, or you can stick a constant zero into the Q input
(details below).

The default wiring depends on the software that controls the given
daughterboard. By default the Basic Rx and LF RX daughterboard code
treats the two inputs as two separate real inputs (not I & Q), one
into DDC 0, one into DDC 1. You can easily override this by calling
u.set_mux(…) The RFX-* daughterboards treat the signals as I & Q,
since that’s the only configuration that makes sense given the
quadrature output of the RFX-* boards.

See http://gnuradio.org/trac/wiki/UsrpRfxDiagrams

/*!

  • \brief Set input mux configuration.
  • This determines which ADC (or constant zero) is connected to
  • each DDC input. There are 4 DDCs. Each has two inputs.
  • 
    
  • Mux value:
  • 3 2 1
  • 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
  • ±------±------±------±------±------±------±------±------+
  • | Q3 | I3 | Q2 | I2 | Q1 | I1 | Q0 | I0 |
  • ±------±------±------±------±------±------±------±------+
  • Each 4-bit I field is either 0,1,2,3
  • Each 4-bit Q field is either 0,1,2,3 or 0xf (input is const zero)
  • All Q’s must be 0xf or none of them may be 0xf

*/
bool set_mux (int mux);

Eric [ decloaking after vacation :wink: ]

Roshan-

is Q. In fact, the two signals could be completely unrelated (as far as
the daughterboard cares). It’s only the USRP that needs to know if the
signals are I and Q or unrelated signals.

  • LFRX uses the AD8132, and the BasicRX uses the ADT1 transformer.

The LFRX has two separate antenna inputs, supplied to Vin-A and Vin-B.
These are not
I-Q data. USRP board FPGA logic would apply one mixer or two (30 MHz or
less).

The OP was wondering he could run the same antenna to both inputs, then
offset
sampling clocks on the A/Ds could by 90 deg (for example invert one
clock) and
effectively double the sampling rate. I think the resulting signal
would have jitter
likely to increase BER.

The daughterboards with tuners obviously do push I and Q down to the
USRP, and I presume do something different to each. I don’t have any
such daughterboards, so I can’t say specifically what each does.

The RFX2400 mixes with a 2.4 GHz osc and creates one set of I-Q 65 MHz
range signals,
+/-I on Vin-A and +/-Q on Vin-B. To get baseband signals, the logic has
to apply two
mixers.

-Jeff

Ian L. wrote:

I assume this also true for the BasicRX daughterboard? (Doesn’t do
downconversion, but does do analog multiplication to get I and Q?)

Almost. The boards don’t do anything with the signal, but have separate
I and Q inputs that go to the ADCs as is.

On the FPGA, however, there are digital mixers that you can use to
convert a center frequency down to baseband, so you get a complex I and
Q signal out of that, even if you only supply a signal to the I input.
That is what is actually happening when you “tune” a BasicRX or LFRX
board.


Johnathan C.
Corgan Enterprises LLC
http://corganenterprises.com

Ian-

Ok, that makes sense. Looking back at this site
(http://www.nd.edu/~jnl/sdr/docs/tutorials/4.html#tth_sEc2.1) I see
that the DDC is combining the I and Q inputs to do complex
multiplication. I originally thought it was multiplying the I and Q
components separately, so that no input to Q would mean zero output
for Q also.

The schematic for the BasicRX daughterboard (lfrx.pdf) shows the board
is not
bringing out I and Q data separately. There are two possible antenna
inputs, brought
to Vin-A and Vin-B. I and Q data is generated in the USRP board logic
by complex
multiply less than 30 MHz. I haven’t verified in the logic yet, but the
results
should be either one set of I-Q data (for one antenna) or two sets (if
both RF inputs
are used).

-Jeff

Eric-

The FPGA DDC logic uses a single but complex mixer to do frequency
The default wiring depends on the software that controls the given
daughterboard. By default the Basic Rx and LF RX daughterboard code
treats the two inputs as two separate real inputs (not I & Q), one
into DDC 0, one into DDC 1. You can easily override this by calling
u.set_mux(…) The RFX-* daughterboards treat the signals as I & Q,
since that’s the only configuration that makes sense given the
quadrature output of the RFX-* boards.

Thanks, that’s very helpful. I thought there would have to be a way to
form
real-valued data for the low-end daughtercards, but hadn’t found it yet.

-Jeff

Ok, that makes sense. Looking back at this site
(http://www.nd.edu/~jnl/sdr/docs/tutorials/4.html#tth_sEc2.1) I see
that the DDC is combining the I and Q inputs to do complex
multiplication. I originally thought it was multiplying the I and Q
components separately, so that no input to Q would mean zero output
for Q also.

Thanks so much!

-Ian L.

On 7/18/07, Johnathan C. [email protected] wrote:

Q signal out of that, even if you only supply a signal to the I input.
That is what is actually happening when you “tune” a BasicRX or LFRX board.


Johnathan C.
Corgan Enterprises LLC
http://corganenterprises.com


My PGP Public Key:
http://www.scrapshark.com/pubkey.txt

Thank you, that’s very helpful.

I assume this also true for the BasicRX daughterboard? (Doesn’t do
downconversion, but does do analog multiplication to get I and Q?)

-Ian

Jeff B. wrote:

I think the OP is confused at what “signal processing” is happening on the RF
daughterboard. Although some recent posts have said “none”, there actually is some
– filters to separate the I and Q signals which were summed at the point of original
transmission to make a single airwave.

I disagree with this; it depends on which daughterboards you’re talking
about. The BasicRX and LFRX daughterboards are I/Q agnostic - the “I”
path and the “Q” path are identical. They do contain hardware* to
convert single ended signals to differential signals for USRP, and
handle biasing. But they don’t care which signal is I and which signal
is Q. In fact, the two signals could be completely unrelated (as far as
the daughterboard cares). It’s only the USRP that needs to know if the
signals are I and Q or unrelated signals.

  • LFRX uses the AD8132, and the BasicRX uses the ADT1 transformer.

The daughterboards with tuners obviously do push I and Q down to the
USRP, and I presume do something different to each. I don’t have any
such daughterboards, so I can’t say specifically what each does.

This is why the two ADCs are actually sampling separate, different signals, even
though their sampling rate clocks are synchronized.

Generally, yes, the ADCs are sampling separate, downconverted to IF
signals (I and Q).

-Roshan

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