USRP2 and MIMO

I have questions about using MIMO on USRP2, and also debugging FPGA code
on USRP2. I am not using UHD.

  1. Connecting 2 USRPs with the MIMO cable:

I am looking at the code for the mimo_tx firmware and do not see how
control packets, say, setting frequency, interpolation, gain etc. are
sent to the slave. The mimo_app_common_v2.c handle_control_chan_frame
function seems to drop these packets right after handling them. The
example code in usrp2/host/apps/test_mimo_tx.cc does not seem to do
anything special either to deal with this, in fact, the code to set any
board specific parameters is commented out. The mimo_tx_slave still has
the handle_control_chan frame code in app_common_v2.c which it uses (not
mimo_app_common). Does that mean the slave USRP also needs to be
connected via ethernet, and one needs to get a handle via the
usrp2::make interface separately to the master and slave to set control
parameters (although the example code in usrp2/host/apps/test_mimo_tx
does not do that)?

  1. Debugging FPGA code on the USRP2:

The USRP2 fpga space available is so small that I can’t really
effectively put chipscope on it. What debugging techniques or tools do
you use to debug the FPGA code on the USRP2?

Thanks,
Arun

On 12/22/2010 02:21 PM, Arun Pillai wrote:

anything special either to deal with this, in fact, the code to set any
board specific parameters is commented out. The mimo_tx_slave still has
the handle_control_chan frame code in app_common_v2.c which it uses (not
mimo_app_common). Does that mean the slave USRP also needs to be
connected via ethernet, and one needs to get a handle via the
usrp2::make interface separately to the master and slave to set control
parameters (although the example code in usrp2/host/apps/test_mimo_tx
does not do that)?

Those apps are old and should be deleted. To see how the MIMO cable is
handled you will need to get the packet_router branch from the UHD
repository.

  1. Debugging FPGA code on the USRP2:

The USRP2 fpga space available is so small that I can’t really
effectively put chipscope on it. What debugging techniques or tools do
you use to debug the FPGA code on the USRP2?

I never use Chipscope, but I know people have used it on the USRP2 in
the past. I prefer to use the MICTOR logic analyzer connector, which
gets you 34 pins. If you need more than that you can use the GPIOs on
the daughterboads if you put BasicRX and BasicTX boards on. That gives
you an extra 32 pins.

Matt

On 12/22/2010 5:33 PM, Matt E. wrote:

example code in usrp2/host/apps/test_mimo_tx.cc does not seem to do
Those apps are old and should be deleted. To see how the MIMO cable
is handled you will need to get the packet_router branch from the UHD
repository.

Thank you. Do I need to use ISE 12 to build this FPGA code? Is there a
particular minor revision number that I need to use in 12?

Arun

Thank you. Do I need to use ISE 12 to build this FPGA code? Is there a
particular minor revision number that I need to use in 12?

pre-built images here
http://www.ettus.com/downloads/uhd_images/experimental/UHD-mimo-cable-support/

-josh

I actually need to modify the FPGA source to add functionality to it. Is
the source available?

Thanks.