Hi all,
I’m hoping to use the USRP2 and a FLEX400 board to receive RF and a
1-bit digital stream simultaneously.
As I understand it (feel free to correct me), this can be done with the
USRP1 by loading a the gr-gpio FPGA image, which will replace the LSB of
the incoming data with the state of one GPIO pin.
Has anything similar been done for the USRP2?
Is anyone planning to add this function to an FPGA image?
Are there other ways to do it?
Any help would be greatly appreciated.
Many thanks,
Drew
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