# USRP2 and Data Rate

Hi all,
A few days ago I made a simple program using grc to fsk modulate and
transmit a pn sequence at 10kbps. Since I was using a USRP1, I set my
samples per symbol to 25 and the interpolation to 512 to get this data
rate.

The place I work at just received a couple USRP2’s, so I am trying to
get
this same program working with the new devices. I realize that the DAC
rate
for the USRP2 is 100 MS/s instead of 128 MS/s, so I changed the samples
per
symbol and interpolation rate to 25 and 400, respectively, but this
does
not give me the 10kbps rate like I expected it would.

Is there something major that I am missing here?

Thanks a lot,
Garrett

On 07/07/2010 11:32 AM, Garrett Wenger wrote:

respectively, but this does not give me the 10kbps rate like I
expected it would.

Is there something major that I am missing here?

Thanks a lot,
Garrett
Garrett:

The DACs on the USRP2 run at 400Msps, not 100Msps. Although the ADCs
on the USRP2 do run
at 100Msps, and that’s perhaps where the confusion comes in.

Marcus L.
Principal Investigator

On 07/07/2010 09:05 AM, Garrett Wenger wrote:

If I am just misunderstanding that and I do need to use 400 MS/s as my
DAC rate, is there some upper limit to what the samples per symbol value
can be? Since interpolation has to be between 4 and 512, the lowest
possible values that I could use to get a 10kbps would be 80 samples per
symbol with 500 as my interpolation rate.

Do all sample rate calculations based on a 100 MS/s DAC, just like the
ADC. So an interp rate on transmit of X will have the same sample rate
as using decim rate X on receive.

Matt

On 07/07/2010 08:32 AM, Garrett Wenger wrote:

but this does not give me the 10kbps rate like I expected it would.

Is there something major that I am missing here?

Your calculations appear correct, so I’m not sure why you aren’t seeing
10kbs. What rate does it give you?

Also, 25 samples per symbol is a lot. You would probably be better off
doing an additional software decimate/interpolate by 5 operation (using
an interpolating/decimating FIR filter) and using 5 samples per symbol.

Matt

I am not quite sure what data rate I am getting. I’ve been using a
signal
analyzer to receive and demod what I’m transmitting and it can generally
pick up the bit sequence that I am now sending out, but I get an error
rate
the fluctuates from about 5% all the way up to 70% or higher.
My cpfsk mod index is set to 1 and the distance between the peaks is
10kHz, so it really seems like my data rate is somewhere around what I
want
it to be, but the error rate is just way to high.

Also, I went ahead and added in the interpolating filter like you
suggested,
but just for future reference, what is bad about having a high samples
per
symbol value?

-Garrett

Marcus,
First of all, thanks for responding so quickly.

I looked on the USRP2 faq and I did see that the DAC rate was listed as
400
MS/s, but later on in the faq it says:
The FPGA talks to the DAC at 100 MS/s just like it talks to the ADC
at
100 MS/s. The interpolation from 100 MS/s to 400 MS/s happens inside the
DAC
chip itself. Unless you are doing something fancy, you can think of the
DAC as operating at 100 MS/s.

If I am just misunderstanding that and I do need to use 400 MS/s as my
DAC
rate, is there some upper limit to what the samples per symbol value can
be?
Since interpolation has to be between 4 and 512, the lowest possible
values
that I could use to get a 10kbps would be 80 samples per symbol with 500
as
my interpolation rate.

Thanks,
Garrett

On 07/07/2010 11:43 AM, Garrett Wenger wrote:

I am not quite sure what data rate I am getting. I’ve been using a
signal analyzer to receive and demod what I’m transmitting and it can
generally pick up the bit sequence that I am now sending out, but I get
an error rate the fluctuates from about 5% all the way up to 70% or higher.
My cpfsk mod index is set to 1 and the distance between the peaks is
about 10kHz, so it really seems like my data rate is somewhere around
what I want it to be, but the error rate is just way to high.

The problem is likely to be frequency offset. I don’t know your carrier
frequency, but at 1 GHz, 10 ppm is 10 kHz. So your 10 kHz wide signal
at 1 GHz could be completely out of the passband if the oscillators are
off by 10 ppm or more. The USRP1 oscillator is typically 5-10 ppm but
the spec is 20 ppm, and the USRP2 is typically 10-20 ppm when not
locked.

Also, I went ahead and added in the interpolating filter like you
suggested, but just for future reference, what is bad about having a
high samples per symbol value?

In theory, nothing. In practice, a couple of things. The higher the
samples per symbol the longer your filters need to be. Also, the
filters in there are chosen for good timing recovery properties, not for
out of band rejection. By having so many samples per symbol, you get a
lot more out of band energy which needs to be rejected.

Matt

I went ahead and locked the USRP2 to my signal analyzer’s reference
clock
and that seemed to knock the error down to about 11-14%, which is
obviously
much improved.

However, I then looked at the signal on an oscilloscope and it looks
like
the USRP2 is sending out short bursts of data instead of a continuous
signal
like I see when using the USRP1. Both boards are using the Flex1800
daughterboard and are transmitting at 1.8GHz. Is there some reason the
USRP2 would not be able to send data continuously even if the programs
I’ve
been running are exactly the same?