My goal is to implement signal conditioning algorithm. Input is the
frequency, output is the optimal gain settings to utilize the full range
ADCs with saturation below acceptable threshold.
I would like to ask for clarification regarding the over-count value.
thread “usrp: rssi/clipping indicator, data glitches”
I see the over-count value can be obtained like urx->_read_fpga_reg(5 +
The returned value 32bit: The lower 16 bits has the RSSI value, and the
upper 16 bits has the over-count value.
How to reset the over-count value? urx->_write_fpga_reg (5 +
The over-count value counts the clipped samples. What is the period
test? Is it number of clipped samples since reset?
What happens when the over-count value reaches its max (2^16)? Does
stays at max?
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