What is available?
I am trying to figure out how to accomplish some level of time
coordination between inband timestamps on the FPGA and the daughterboard
communication via the FX2.
Exact sample clock precision isn’t expected and just a predictable
latency channel might do.
Can the FX2 peek/intercept USB packets from the FPGA? What about an
unused pin connection to be used as a time marker?
–ETS