USRP1 DBSRX 10MHz reference clock

GNU Radio
1

I would like to change the USRP master clock to 10MHz.

I call urx->set_fpga_master_clock_freq(10e6) prior to
usrp_standard_rx::make.

I wonder how to set the REFCLK_DIVISOR in db_dbs_rx::_refclk_divisor().

From all examples I have seen the (master_clock/REFCLK_DIVISOR) is 4MHz.
This would mean REFCLK_DIVISOR must be 2.5, but on the other hand it
must be
an integer…

Can I set the REFCLK_DIVISOR to 3 (resulting in Max2118 clock 3.33MHz)?
Or
would you recommend something else?

View this message in context:
http://www.nabble.com/USRP1-DBSRX-10MHz-reference-clock-tp24056670p24056670.html
Sent from the GnuRadio mailing list archive at Nabble.com.

2

On Tue, Jun 16, 2009 at 08:23:37AM -0700, Kutik wrote:

an integer…

Can I set the REFCLK_DIVISOR to 3 (resulting in Max2118 clock 3.33MHz)? Or
would you recommend something else?

Can you tell us what you are really trying to do? Why do you want to
change the master clock to 10MHz? The USRP won’t function with that
slow of a clock. It won’t be able to talk over the GPIF port to the
FX2 USB controller.

Eric

3

Eric B. wrote:

From all examples I have seen the (master_clock/REFCLK_DIVISOR) is 4MHz.
slow of a clock. It won’t be able to talk over the GPIF port to the
FX2 USB controller.

Eric

Thanks for the answer,

I would like to acquire narrowband data (200 kHz). In this range I’ll
receive multiple CW signals. The maximal frequency inaccuracy is 2kHz.
Therefore USRP1 has to be disciplined by precise reference clock.

I have 10MHz reference signal available, and hoped there will be no need
to
buy 64MHz oscillator (disciplined by 10MHz).

I’ve read (usrp_basic.h) the master clock range is 10-64MHz, thus I
wanted
to give it a try.

View this message in context:
http://www.nabble.com/USRP1-DBSRX-10MHz-reference-clock-tp24056670p24060062.html
Sent from the GnuRadio mailing list archive at Nabble.com.

4

On Tue, Jun 16, 2009 at 11:24:31AM -0700, Kutik wrote:

I wonder how to set the REFCLK_DIVISOR in db_dbs_rx::_refclk_divisor().
Can you tell us what you are really trying to do? Why do you want to
I would like to acquire narrowband data (200 kHz). In this range I’ll
receive multiple CW signals. The maximal frequency inaccuracy is 2kHz.
Therefore USRP1 has to be disciplined by precise reference clock.

I have 10MHz reference signal available, and hoped there will be no need to
buy 64MHz oscillator (disciplined by 10MHz).

I’ve read (usrp_basic.h) the master clock range is 10-64MHz, thus I wanted
to give it a try.

OK, thanks.

After some off-list discussion, I think you should be able to make
this work. I expect that Johnathan or Matt will chime in with some
additional information. (The GPIF bus uses a clock from the FX2, so I
was mistaken about that being a problem.)

Eric

5

Johnathan C. wrote:

The DBSRX would work like this, as long as you modified the reference
divider in the DBSRX control code. However, the question is why would
you want to reduce the sampling rate so much?

Matt

6

On Tue, Jun 16, 2009 at 11:41 AM, Eric B.[email protected] wrote:

After some off-list discussion, I think you should be able to make
this work. I expect that Johnathan or Matt will chime in with some
additional information. (The GPIF bus uses a clock from the FX2, so I
was mistaken about that being a problem.)

Yes, it is possible to clock a USRP1 at 10 MHz. However, I’ve only
ever done this with BasicRx/BasicTx boards, so I can’t comment on how
or whether the DBSRX boards will work or in this scenario.

Johnathan