USRP.. programming the FPGA


#1

Hello all,

I am a student doing a project, which uses USRP board.

As a first step of my project i tried to programmin the FPGA, with a
verilog code.
i am usin QUARTUS 2 for downloding the code, but i am not able to do
it.
i get a message which says hardware is not found,

for information, i am using windows XP and web version of quartus 2
software.

i saw the discussion on other topic on this group which looks very in
depth technical for me, becoz i dont have so much idea in this, so may
be mine discussion will look like a small topic.

But anyway, i hope for help and information regarding this.

Thank you
pankaj


#2

On 2/26/07, pankaj kumar removed_email_address@domain.invalid wrote:

Hello all,

I am a student doing a project, which uses USRP board.

As a first step of my project i tried to programmin the FPGA, with a verilog
code.
i am usin QUARTUS 2 for downloding the code, but i am not able to do it.
i get a message which says hardware is not found,

How are you connected to the USRP to download the code? I don’t think
there are JTAG connections for Quartus II to directly program the FPGA
on the board.

Instead, the image has to go down over the USB through the USRP
libraries supplied with GNU Radio and get programmed by the FX2.

Brian


#3

On Mon, Feb 26, 2007 at 07:38:06AM -0800, pankaj kumar wrote:

i saw the discussion on other topic on this group which looks very in depth technical for me, becoz i dont have so much idea in this, so may be mine discussion will look like a small topic.

But anyway, i hope for help and information regarding this.

Thank you
pankaj

Before trying to modify anything, start by building GNU Radio and
running the existing examples. I suggest usrp_fft.py as a starting
point.

Once you’ve got those working and understand them, then begin to think
about making modifications. Also, you’ll have better luck with GNU
Radio under GNU/Linux than under Windows. (You will have to use
windows to compile any Verilog changes.) We do provide precompiled
verilog in svn and the tarballs.

Eric


#4

On Mon, Feb 26, 2007 at 08:21:10AM -0800, pankaj kumar wrote:

the code which you have suggested, how to get that…?

usrp_fft.py

where i am supposed to get this one…

pankaj

First off, download the GNU Radio code.

Start here: http://gnuradio.org/trac/wiki

It’s in gnuradio-examples/python/usrp/usrp_fft.py

Eric


#5

Hello, All:
I am running the following small program which generate a periodical
signal using vectors. I got Segmentation Fault, as shown in the
following:

========================================================================
lx@lx-desktop:sudo ./Signal3.py
Blocked waiting for GDB attach (pid = 7714)
Press Enter to continue:
Sample rate = 8M
Signal will generated by : A: Flex 2400 Tx
Carrier : 2.468G
Press Enter to quit :
uUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUuUSegmentation fault

Could anyone give any suggestion on how to trace the bug or why it
happens?

BTW, I tried to use gdb, whenver I do “(gdb) attach PID” the program
stops
running, it resumes until I quit from gdb.

Thank you for your input.
xin

The python program

#!/usr/bin/env python
from gnuradio import gr
from gnuradio import usrp
from gnuradio import eng_notation
import os
print ‘Blocked waiting for GDB attach (pid = %d)’ % (os.getpid(),)
raw_input ('Press Enter to continue: ')

def build_graph (carrier=2.462e9):

interp = 16
duc0 = 5e6 # IF frequency
nchan = 1

fg = gr.flow_graph ()

dest = usrp.sink_c (0, interp, nchan)
sample_rate = dest.dac_freq() / interp
print "Sample rate = ", eng_notation.num_to_str (sample_rate)
dest.set_tx_freq (0, duc0)
dest.set_pga(0,20)

max = (2**15)-1
min = -max
vector = []
for i in range(40):
vector.append(complex(max,max))
vector.append(complex(max,min))
vector.append(complex(min,max))
vector.append(complex(min,min))
for i in range(60):
vector.append(complex(0,0))

src = gr.vector_source_c(vector,True)
fg.connect (src, dest)

dboard = usrp.selected_subdev(dest, (0,0))

print “Signal will generated by :”, dboard.side_and_name()

rf = dest.tune(dboard._which, dboard, carrier)
if rf:
print “Carrier :”, eng_notation.num_to_str(rf.baseband_freq)
else:
print “The range of the daugtherboard’s frequency is :”,
eng_notation.num_to_str(dboard.freq_range()[0]), “-”,
eng_notation.num_to_str(dboard.freq_range()[1])
raise SystemExit

return fg

if name == ‘main’:

mygraph = build_graph ()
mygraph.start ()
raw_input ("Press Enter to quit : ")
mygraph.stop ()