USRP pin sink

Is it possible to use a spare pin on the USRP (say, for example, on a
daughtercard) as a signal sink?

In other words, if I have a char signal stream in software, in which
only
the bottom bit of the 8 bits is active, how do I get that bit back out
into
hardware-land?

Many thanks for your time (even if the answer is “no, there’s no easy
way to
do it, short of writing custom vhdl…”).

-Steven

Steven C. wrote:

Is it possible to use a spare pin on the USRP (say, for example, on a
daughtercard) as a signal sink?

In other words, if I have a char signal stream in software, in which
only the bottom bit of the 8 bits is active, how do I get that bit
back out into hardware-land?

Many thanks for your time (even if the answer is “no, there’s no easy
way to do it, short of writing custom vhdl…”).

You can read the state of the pins using python code. If you want it to
stream at a regular rate then you’ll need to write your own Verilog.

Matt

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