Hi at all,
I need to implement an AGC to adapt the signal to the ADC’s full
dynamics.
I work with an USRP N210 with CBX-40USRP DAUGHTERBOARD…
I investigated that :
There is a programmable gain amplifier (PGA) before the ADCs to amplify
the
input signal to utilize the entire input range of the ADCs, in case the
signal is weak.
This PGA is software programmable.
Auxiliary Digital I/O Ports:
The USRP motherboard has high speed 64 bit digital I/O ports.
These digital I/O pins are connected to the
daughterboards interface connecters (RxA, TxA, RxB and TxB).
These signals can be controlled from software by reading/writing to
special
FPGA registers and each can be independently configured either as
digital
input or digital output.
Some of these pins are used to control specific operations on the
installed
daughterboards such as
controlling the selection of receiving RF input port, in automatic
transmit/receive mode,
controlling power supply feeding for different TX and RX parts,
synthesizer
lock detection,…etc.
It can be also used to implement AGC processing and can be very helpful
in
debugging FPGA
implementations when connected to a logic analyzer.
So, using UHD USRP SINK, the PGA is modified just acting on the field
Ch0:
Gain(dB) ???
Second, there is some block that allow to extract these Auxiliary
Digital
I/O Ports ???
Practically I want extract analog data before the PGA to process it
software…