USRP FPGA resource utilization

Dear All,

I’m planning to use the DBSRX with USRP board. After the frequency
translation and filtering I want to process the samples further inside
the
FPGA, before transferring it to the host.

Could you please let me know the resource utilization of EP1C12 in the
USRP
board, assuming that I need samples at (i) 64MHz (ii) 32MHz, (two
cases). It
would help me know beforehand whether I’ll be doing my part of the
processing in FPGA or software.

Thanks in advance,
Nagaraj

On Nov 21, 2007 9:36 PM, C S Nagaraj [email protected] wrote:

Dear All,

I’m planning to use the DBSRX with USRP board. After the frequency
translation and filtering I want to process the samples further inside the
FPGA, before transferring it to the host.

If you don’t mind me asking, could you be a little more specific as to
what you want to accomplish?

Could you please let me know the resource utilization of EP1C12 in the USRP
board, assuming that I need samples at (i) 64MHz (ii) 32MHz, (two cases). It
would help me know beforehand whether I’ll be doing my part of the
processing in FPGA or software.

Depending on the load and what your needs are (2xRX, 2xTX, 4xRX, etc)
and how flexible you need to be (one bandwidth, selectable bandwidth,
etc) the utilization varies.

With regards to your sample rate, is that the bandwidth you’re trying
to process, or are you looking at less bandwidth? What kind of
processing are you looking to do within the FPGA? Again, a little
more information here might be more helpful.

Brian

Hi Brian,

Thanks for the reply.

Well, I have to decide the actual processing what goes inside the FPGA
based
on the resource that will be left-over.

To start with, I’ll be using only 1RX to obtain the signal at a fixed
bandwidth of 60MHz (+/- 30MHz at base band, I/Q sampling) sampled at
64MHz.
So for this case, if I know the resource utilization it is enough as all
the
other cases are subsets of this case in my design.

Regards,
Nagaraj

On Nov 21, 2007 10:24 PM, C S Nagaraj [email protected] wrote:

other cases are subsets of this case in my design.
To process that much bandwidth, you can’t really use the CIC or the
halfband FIR filter so you’re really just looking at some FIFOs to
talk to the FX2 microcontroller - the rest of the FPGA is all yours.

With all that bandwidth, I can only imagine you’re looking to do some
sort of multitone/OFDM style waveform.

Brian

hello,
i am working with FPGA, USRPB and GNU radio. Can you tell me how to calculate resource utilization in FPGA?

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