USRP and RFX2400 block diagrams

I’ve taken a shot at coming up with block diagrams for the USRP and
RFX2400. The diagram for the USRP is the result of information I’ve
gleaned from different messages in the list, data sheets, and block
diagrams created by other GNU Radio users (specifically, Achilleas
Anastasopoulos). The RFX2400 diagram was created from Matt’s drawings
and associated data sheets.

The diagrams can be found here:
http://www.pattoncentral.org/gnuradio/diagram/

Hopefully this will help clear up questions regarding how the I/Q
sampling happens. Please let me know if (when) you see something that
needs fixed.

Thanks,
Lee

On Tue, Aug 29, 2006 at 10:08:47PM -0400, Lee P. wrote:

I’ve taken a shot at coming up with block diagrams for the USRP and
RFX2400. The diagram for the USRP is the result of information I’ve
gleaned from different messages in the list, data sheets, and block
diagrams created by other GNU Radio users (specifically, Achilleas
Anastasopoulos). The RFX2400 diagram was created from Matt’s drawings
and associated data sheets.

The diagrams can be found here:
http://www.pattoncentral.org/gnuradio/diagram/

Nice diagrams! Thanks!

Here are a couple of tweaks:

The digital down-conversion should show a single complex multiplier
instead of two real multipliers.

Same comment on the digital up-conversion. We’ve got “Block D”
enabled in the AD9862, thus it’s functioning as a complex multiplier.

Hopefully this will help clear up questions regarding how the I/Q
sampling happens. Please let me know if (when) you see something that
needs fixed.

Thanks,
Lee

Eric

On Wed, 2006-08-30 at 06:56 +0000, Eric B. wrote:

Nice diagrams! Thanks!

Glad to.

Here are a couple of tweaks:

The digital down-conversion should show a single complex multiplier
instead of two real multipliers.

Thanks. I’ll make the change. A complex multiplier is just a more
efficient digital version of what I’ve drawn, right?

Same comment on the digital up-conversion. We’ve got “Block D”
enabled in the AD9862, thus it’s functioning as a complex multiplier.

Okay. Out of curiosity, is “Block B” enabled too?

On Wed, Aug 30, 2006 at 01:28:33PM -0400, Lee P. wrote:

http://www.pattoncentral.org/gnuradio/diagram/
Thanks. I’ll make the change. A complex multiplier is just a more
efficient digital version of what I’ve drawn, right?

No. They’re not equivalent. The naive complex multiplier has 4 real
mulitipliers and two adders:

(a + bj) * (c + dj) = (ac - bd) + (ad + bc)j

Same comment on the digital up-conversion. We’ve got “Block D”
enabled in the AD9862, thus it’s functioning as a complex multiplier.

Okay. Out of curiosity, is “Block B” enabled too?

Yes, if it needs to be.

Eric

efficient digital version of what I’ve drawn, right?

Not exactly. What you show in the diagram is that Iout is a function of
only Iin, and the same for Q. In reality Iout is a function of both Iin
AND Qin. The same goes for Qout.

Think of it as a complex multiply –

(a + bi) * (c + di) = (ac-bd) + (ad+bc)i

There are actually 4 multiplications happening.

We implement this all in a CORDIC structure, which is much more area
efficient than using 4 multiplies. In fact, it is smaller than a single
multiply.

Same comment on the digital up-conversion. We’ve got “Block D”
enabled in the AD9862, thus it’s functioning as a complex multiplier.

Okay. Out of curiosity, is “Block B” enabled too?

Yes. This is actally one of the major differences between the
upconverter path and the downconverter path–

In the downconverter (in the FPGA), we run the complex multiply at the
full sample rate.

In the upconverter (in the AD9862, from Figure 3 in the 9862 docs), they
split the complex multiply into 2 parts – coarse and fine. The fine
part (block D) runs at 1/4 of the sample rate. This means that it can
only move the freqency 1/4th as far. The block is then followed by the
4x interpolation (Block C), and then the coarse modulation, Block B.
Block B only moves the signal +/- fs/4 or fs/8.

Matt

Thanks for posting this – very useful indeed.

Minor fix on the Tx chain: I think the ADF4360 PLL feeds the LO port(s)
of
the Quad. Mod.

cheers.
nikhil

Eric,
If we start usrp_siggen.py, for instance, and set -f 0
(zero) or no frequency at all, what blocks gets
activated?

Angilberto.

— Eric B. [email protected] wrote:

gleaned from different messages in the list,
Nice diagrams! Thanks!
multiplier is just a more
We’ve got “Block D”


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On Wed, 2006-08-30 at 20:25 -0400, Nikhil wrote:

Thanks for posting this – very useful indeed.

Minor fix on the Tx chain: I think the ADF4360 PLL feeds the LO
port(s) of the Quad. Mod.

Definitely. Fixed it. Thanks for the feedback.

-Lee