Hello,
I’m looking to use the MIMO port to send serial data to a Virtex5
board and am trying to get an idea of how to set up the USRP2 to
achieve this.
- I was wondering how a simple loopback test might be achieved.
Something simple like taking what the TI chip gives the FPGA and
sending it back out. Not sure if I should be concerning myself with
the HDL code running on the Spartan 3. (usrp2/fpga/serdes)
- It looks like I will probably have to flash the firmware and I’m not
sure what the best s/w configuration would be. (mimo_tx.bin,
serdes_txrx.bin, my own, …)
My guess: I will need to create my own app.c in usrp2/firmware/apps
which receives a serial packet and sends it back out, compile this,
then flash it to the SD card to be run on the aeMB.
I think I’m just trying to get an idea of what code I should be
using/modifying to perform the tasks I want using the MIMO port.
Charles
Hello again,
I decided to try and run the mimo_tx.bin (built from SVN rev 11663) as
the s/w firmware and use the Virtex5 board as the “slave USRP2” since
this would require almost no changes to the gnuradio side. I’m using
u2_rev3_ise10.1sp3_r11370.bin as the FPGA bitstream. When I run the
host app ./test_mimo_tx I get the following error and everything
freezes up (cannot ctrl-c, have to reboot the usrp2):
“usrp2::ctor reset_db failed”
Most people seem to be able to fix this with a firmware update because
of some new process in libusrp2 with initialization. If this is the
case then it must be something in mimo_tx.c that needs to be updated.
Either that or the host app. Any ideas?
Might be important: I’m not sure what type of modifications to mb-gcc
are imperative for building firmware for the aeMB, but I’m using the
standard version that comes with ISE for the vanilla microblaze as I
didn’t want to mess up the toolchain for standard development.
Charles
On 11/24/2009 03:10 PM, Charles I. wrote:
Hello,
I’m looking to use the MIMO port to send serial data to a Virtex5
board and am trying to get an idea of how to set up the USRP2 to
achieve this.
- I was wondering how a simple loopback test might be achieved.
Something simple like taking what the TI chip gives the FPGA and
sending it back out. Not sure if I should be concerning myself with
the HDL code running on the Spartan 3. (usrp2/fpga/serdes)
The easiest way to check for physical connectivity would be to turn on
the loopback mode in the TI SERDES chip itself. You can do this by
changing some firmware in the aemb, without having to recompile the
FPGA.
- It looks like I will probably have to flash the firmware and I’m not
sure what the best s/w configuration would be. (mimo_tx.bin,
serdes_txrx.bin, my own, …)
Yes, you’ll need to do firmware. If you just modify the main() function
to set the loopback, it doesn’t matter which firmware you start with.
My guess: I will need to create my own app.c in usrp2/firmware/apps
which receives a serial packet and sends it back out, compile this,
then flash it to the SD card to be run on the aeMB.
Once you have confirmed physical layer communications using the loopback
test above, run the sd_gentest.bin firmware. It will send packets out
at a high rate and look for them to be sent back.
Let me know if you have any further questions.
BTW, I don’t know how you intended to physically connect the boards.
The best long term solution is to have your own custom board which
implements the connections we use (SAS). In the short term, you can buy
a SAS to quad SATA breakout cable. This would connect right to the SATA
headers on many FPGA eval boards.
Matt