I have following queries regarding FPGA in USRP2.
Data flow for the ADC samples. To which modules does it go, how is it
processed and finally how is it sent out by FPGA.
How does the Host and FPGA communicate with each other. Is there an
interrupt being created at the ethernet port and then Microblaze uses
interrupt handling. Which modules are involved.
How does 1PPS signal help.