I would like to be able to control pins 5, 7, 9,… , and 35 on the J401
component on the N210 (Pins G4, F5, H6, …, and K6 on the FPGA). From
the
Basic_Tx/Rx daughterbaord schematic, I was able to see that some of
these
pins are not really used on the daughterboard. I am working on
implementing
a MAC protocol that will be using a number directional antennas to send
our
information. I wanted to use these pins in order to select the antenna
direction needed for the communication. I have followed the code all the
way
to the multi_usrp.cpp file. I have also looked into the db_xcvr2450.cpp
file
to see how this pins are controlled. I am having trouble figuring out
which
lines of code I need in the db_basic_lf.cpp in order to control these
pins
in the basic daughterboards. I would greatly appreciate any help or
advice.
Thank you for your time and help.
to the multi_usrp.cpp file. I have also looked into the db_xcvr2450.cpp file
to see how this pins are controlled. I am having trouble figuring out which
lines of code I need in the db_basic_lf.cpp in order to control these pins
in the basic daughterboards. I would greatly appreciate any help or advice.
Thank you for your time and help.
I have looked over the dboard iface file, but I am still a little
confused.
I am able to use swig to call the dboard_iface() within my python code,
but I am not sure about what other functions I need in order to control
those pins. I saw that within the dboard_xcvr2450.cpp file they call
set_pin_ctrl, set_gpio_ddr, and set_atr_reg. Do I also need to call all
three? I am also unsure about the inputs that go into these functions.
Thank you for help and time.
I have looked over the dboard iface file, but I am still a little confused.
I am able to use swig to call the dboard_iface() within my python code,
but I am not sure about what other functions I need in order to control
those pins. I saw that within the dboard_xcvr2450.cpp file they call
set_pin_ctrl, set_gpio_ddr, and set_atr_reg. Do I also need to call all
three? I am also unsure about the inputs that go into these functions.
Thank you for help and time.
Well, setting output and data direction is a lot like any GPIO.
Whats different here is ATR. When you set a pin to be under ATR control,
the pin can be transitioned when the FPGA changes state (rxing, idle,
txing, full duplex). Setting ATR state tells the pins what the output
should be under each FPGA state. This makes switching automatic.
-josh
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