Trying to use the complex int16 option of the UHD blocks

GNU Radio
1

Hello,

I am trying to use the complex int16 option of the UHD (source/sink)
blocks in my GRC generated python codes. I am doing wide band spectral
analysis in my experiments. Therefore, 50 MS/s will be very helpful for
me.

I currently have a working transmitter and receiver that use the complex
float32 option of the UHD blocks. I am getting 25 MS/s rate at this
point.
The images of the transmitter and the receiver flow graphs are attached
as
“Original_Float_32_transmitter.png” and
“Original_Float_32_receiver.png”. I
used the “Reconstructed_int16_transmitter.png” and
“Reconstructed_int16_receiver.png” as the new transmitter and the
receiver
with the complex int16 option. However, I am finding difficulty to
connect
the signal processing blocks with the UHD (complex int16) block at this
point. I have the following issues:

  1. In my original transmitter flow-graph, the real part of the complex
    input to UHD is coming from a GLFSR->RRC float source. The imaginary
    part
    is coming from a null source. I don’t see any int option in the RRC
    block
    and an int->complex block in GRC. Therefore, I am not sure how I can
    transmit GLFSR as the real part & null as the imaginary part with the
    Complex Int16 option.

  2. In my original receiver, the complex float32 output is going through
    a
    polyphase clock synchronizer that provides a complex -> complex
    conversion.
    However, when I use complex int16 in the transmitter, I have to use
    float->float in polyphase clock sync to ensure type matching in GRC
    window.
    Firstly, I don’t know if the polyphase synchronization is working on the
    real & imaginary part in the desired manner at this point. Secondly,
    when I
    run this receiver, I get the following error:

TypeError: pfb_clock_sync_fff() takes at most 6 arguments (7 given)

Overall, I want to use the complex int16 option in my original
transmitter

  • receiver flow graph so that I can achieve 50 MS/s rate. Any suggestion
    will be appreciated.

Thanks,

Nazmul

–
Muhammad Nazmul I.

Graduate Student
Electrical & Computer Engineering
Wireless Information & Networking Laboratory
Rutgers, USA.

2

On 07/22/2012 01:14 PM, Nazmul I. wrote:

Hello,

I am trying to use the complex int16 option of the UHD (source/sink)
blocks in my GRC generated python codes. I am doing wide band spectral
analysis in my experiments. Therefore, 50 MS/s will be very helpful for me.

The host format and the wire format are totally independent options
here. Both of these properties also configurable properties in the GRC
USRP source/sink blocks.

  • You need to set the wire format to sc8 (thats 2 bytes per complex
    sample) to achieve 50 Msps over gigabit ethernet.

  • The desired host format does not have to change. fc32 (complex floats)
    is a perfectly valid setting

-josh

3

Hi Josh,

I am just wondering how the USRP performs the 8 bit mapping for I & Q
samples. The ADC & DAC have 12 - 14 bit precision, I think. When I
select
the sc8 wire format, does the USRP divide the entire received signal
range
into 2^8 sectors and uses one number to represent each of those?

Thanks,

Nazmul

On Sun, Jul 22, 2012 at 4:22 PM, Josh B. [email protected] wrote:

-josh

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–
Muhammad Nazmul I.

Graduate Student
Electrical & Computer Engineering
Wireless Information & Networking Laboratory
Rutgers, USA.

4

Thanks, Josh.

How can I specify the peak from GRC generated Python code? For example,
when I select the sc8 wire format, the following code is generated
through
GRC.

stream_args=uhd.stream_args(
cpu_format=“fc32”,
otw_format=“sc8”,
channels=range(1),
),

If I want to limit the peak to 0.1 (if the received signal is very
weak),
can I just use the following?

stream_args=uhd.stream_args(
cpu_format=“fc32”,
otw_format=“sc8”,
peak = 0.5,
channels=range(1),
),

Thanks,

Nazmul

On Thu, Jul 26, 2012 at 8:15 PM, Josh B. [email protected] wrote:

blocks in my GRC generated python codes. I am doing wide band spectral

–
Muhammad Nazmul I.

Graduate Student
Electrical & Computer Engineering
Wireless Information & Networking Laboratory
Rutgers, USA.

5

On 07/26/2012 05:09 PM, Nazmul I. wrote:

Hi Josh,

I am just wondering how the USRP performs the 8 bit mapping for I & Q
samples. The ADC & DAC have 12 - 14 bit precision, I think. When I select
the sc8 wire format, does the USRP divide the entire received signal range
into 2^8 sectors and uses one number to represent each of those?

Technically, there is just a multiply and slice operation. You can
specify peak to optimize for the best use of t 8 bits of dynamic range.
See:
http://files.ettus.com/uhd_docs/doxygen/html/structuhd_1_1stream__args__t.html#a4463f2eec2cc7ee70f84baacbb26e1ef

-josh

6

try entering peak = 0.5 for stream args in grc usrp block and take a
look at the generated code

_josh