Transmitting two independent Signals

hi all,

we have been searching for a way to transmit two independent signals one
on TxA and the other on TxB.
we have read the Tx_MUX documentation and tried some settings but we
only could send two different frequencies two only 80khz!!! and we
always have had two signals!
what we like to do is is to chose the “two independent real signal” mode
on the AD9862, how can we do that, just change the AD9862.h, or some
different approach? if yes how to load it to the USRP.
reading some of the forum questions, we understand that the gnuradio
have the “Dual channel complex” mode and changing it would give
conflicts with the FPGA and the software.

is there some thing that we’re missing or just not understanding.

thanks,

Wim & anmar

On Tue, Feb 20, 2007 at 03:41:31PM +0100, anmar wrote:

hi all,

we have been searching for a way to transmit two independent signals one
on TxA and the other on TxB.

Using two daughterboards, you can send different complex baseband
signals out the A side d’board and the B side d’board. You must set
nchan=2 in the usrp.sink_c constructor, and provide an interleaved
stream of complexes. (Yes, the interface is a bit strange and ought
to be revisited/fixed.) You can create the interleaved output stream
using

u = usrp.sink_c(nchan=2, interp_rate=)

src0 =
src1 =
interleaver = gr.interleave(gr.sizeof_gr_complex)
fg.connect(src0, (interleaver, 0))
fg.connect(src1, (interleaver, 1))
fg.connect(interleaver, u)

r0 = u.tune(0, u.db[0][0], freq_0) # set center freq on side A
d’board
r1 = u.tune(1, u.db[1][0], freq_1) # set center freq on side B
d’board

we have read the Tx_MUX documentation and tried some settings but we
only could send two different frequencies two only 80khz!!! and we
always have had two signals!
what we like to do is is to chose the “two independent real signal” mode
on the AD9862, how can we do that, just change the AD9862.h, or some
different approach? if yes how to load it to the USRP.
reading some of the forum questions, we understand that the gnuradio
have the “Dual channel complex” mode and changing it would give
conflicts with the FPGA and the software.

That’s right. If you’re using a single Basic Tx daughterboard, and
you want independent real output out the I and Q, that’ll take a fair
amount of hacking. Using two daughterboards is going to be much, much
easier :wink:

is there some thing that we’re missing or just not understanding.

thanks,

Wim & anmar

Eric

Eric B. wrote:

On Tue, Feb 20, 2007 at 03:41:31PM +0100, anmar wrote:

hi all,

we have been searching for a way to transmit two independent signals one
on TxA and the other on TxB.

Using two daughterboards, you can send different complex baseband
signals out the A side d’board and the B side d’board. You must set
nchan=2 in the usrp.sink_c constructor, and provide an interleaved
stream of complexes. (Yes, the interface is a bit strange and ought
to be revisited/fixed.) You can create the interleaved output stream
using

u = usrp.sink_c(nchan=2, interp_rate=)

src0 =
src1 =
interleaver = gr.interleave(gr.sizeof_gr_complex)
fg.connect(src0, (interleaver, 0))
fg.connect(src1, (interleaver, 1))
fg.connect(interleaver, u)

r0 = u.tune(0, u.db[0][0], freq_0) # set center freq on side A
d’board
r1 = u.tune(1, u.db[1][0], freq_1) # set center freq on side B
d’board

we have read the Tx_MUX documentation and tried some settings but we
only could send two different frequencies two only 80khz!!! and we
always have had two signals!
what we like to do is is to chose the “two independent real signal” mode
on the AD9862, how can we do that, just change the AD9862.h, or some
different approach? if yes how to load it to the USRP.
reading some of the forum questions, we understand that the gnuradio
have the “Dual channel complex” mode and changing it would give
conflicts with the FPGA and the software.

Hi Eric,
thanks for your answer,

That’s right. If you’re using a single Basic Tx daughterboard, and
you want independent real output out the I and Q, that’ll take a fair
amount of hacking. Using two daughterboards is going to be much, much
easier :wink:

ok that is to bad, but do you know any one how tried to do this, or do
you know where to begin hacking :)?
We just want to see if it can be done with the time that we have, or
just go and use two Tx daugterboards.

thanks

On Wed, Feb 21, 2007 at 11:11:17AM +0100, anmar wrote:

stream of complexes. (Yes, the interface is a bit strange and ought
fg.connect(interleaver, u)
That’s right. If you’re using a single Basic Tx daughterboard, and
you want independent real output out the I and Q, that’ll take a fair
amount of hacking. Using two daughterboards is going to be much, much
easier :wink:

ok that is to bad, but do you know any one how tried to do this

No.

or do you know where to begin hacking :)?

Getting this right requires understanding how the host, the FPGA code
and the AD9862 all interact. If you’ve been following Brian’s
questions about the FPGA over the past few days, you’re on the right
track. Note also, that if you send two real signals to the AD9862 you
lose the use of the digital up converter (“Fine Modulator”) in the
AD9862. Assuming you need a DUC, you’ll have to reimplement this
functionality in the FPGA. [In “two independent real signal mode” you
only have Block C “Interpolator” and Block B “Coarse Modulator”
available.]

We just want to see if it can be done with the time that we have, or
just go and use two Tx daugterboards.

Any particular reason you don’t want to use two Tx daughterboards?
If you use two Tx daughterboards, you could have your independent-signal
transmitter up and working in 30 minutes.

Eric

[FYI, your mail tool seems to be hard-coding the Reply-To address to
point to list. This is somewhat inconvenient in that it keeps readers
from being able to select between replying to the list or replying to
only you.]

Eric B. wrote:

On Wed, Feb 21, 2007 at 11:11:17AM +0100, anmar wrote:

stream of complexes. (Yes, the interface is a bit strange and ought
fg.connect(interleaver, u)
That’s right. If you’re using a single Basic Tx daughterboard, and
you want independent real output out the I and Q, that’ll take a fair
amount of hacking. Using two daughterboards is going to be much, much
easier :wink:

ok that is to bad, but do you know any one how tried to do this

No.

or do you know where to begin hacking :)?

Getting this right requires understanding how the host, the FPGA code
and the AD9862 all interact. If you’ve been following Brian’s
questions about the FPGA over the past few days, you’re on the right
track. Note also, that if you send two real signals to the AD9862 you
lose the use of the digital up converter (“Fine Modulator”) in the
AD9862. Assuming you need a DUC, you’ll have to reimplement this
functionality in the FPGA. [In “two independent real signal mode” you
only have Block C “Interpolator” and Block B “Coarse Modulator”
available.]

We just want to see if it can be done with the time that we have, or
just go and use two Tx daugterboards.

Any particular reason you don’t want to use two Tx daughterboards?
If you use two Tx daughterboards, you could have your independent-signal
transmitter up and working in 30 minutes.

Eric

Hi Eric!!
Thanks for the answers!! we asked this because we want to sent 3 signals
out of one USRP board… But thats not impossible reading the answers…
thats to bad!
Thank you!!!

Anmar

On Fri, Feb 23, 2007 at 10:17:21AM +0100, anmar wrote:

functionality in the FPGA. [In “two independent real signal mode” you
Eric

The fm_tx_2_daughterboards.py code is about the simplest code that
transmits on two daughterboards. What part of it do you have
questions about? Do you understand how to transmit on a single
daughterboard?

Eric

Eric B. wrote:

On Wed, Feb 21, 2007 at 11:11:17AM +0100, anmar wrote:

stream of complexes. (Yes, the interface is a bit strange and ought
fg.connect(interleaver, u)
That’s right. If you’re using a single Basic Tx daughterboard, and
you want independent real output out the I and Q, that’ll take a fair
amount of hacking. Using two daughterboards is going to be much, much
easier :wink:

ok that is to bad, but do you know any one how tried to do this

No.

or do you know where to begin hacking :)?

Getting this right requires understanding how the host, the FPGA code
and the AD9862 all interact. If you’ve been following Brian’s
questions about the FPGA over the past few days, you’re on the right
track. Note also, that if you send two real signals to the AD9862 you
lose the use of the digital up converter (“Fine Modulator”) in the
AD9862. Assuming you need a DUC, you’ll have to reimplement this
functionality in the FPGA. [In “two independent real signal mode” you
only have Block C “Interpolator” and Block B “Coarse Modulator”
available.]

We just want to see if it can be done with the time that we have, or
just go and use two Tx daugterboards.

Any particular reason you don’t want to use two Tx daughterboards?
If you use two Tx daughterboards, you could have your independent-signal
transmitter up and working in 30 minutes.

Eric

hi Eric,
can you post an example that transmits to tx signales from two tx
boards?
we have trying the code that you posted earlier, but it won’t work. we
have tyied the fm_tx_2_daugtherboards.py that worked well, but is pit
comcplicated to understand and when modifying it don’t work any more.

thanks in advance
anmar and wim

Hi -
I have been using the code snippet below as a reference to transmit two
signals with my USRP. However, when trying to run the code under a
peer’s
newer Ubuntu installation (w/ the latest GNU Radio code), I get an error
stating that an object is unsubscriptable. It is referring to the
following
line in my code:


self.dst = usrp.sink_c(nchan=2)

self.subdev = (self.dst.db[0][0], self.dst.db[1][0]) <----
Error
here

From reading online (http://www.daniweb.com/forums/thread192533.html), I
see
that this error occurs when the object that is being indexed into is
‘NoneType’. My question is why would this work on my installation and
not
my peers? Is there something silly I am not changing due to the usage
of
the newer GNU Radio code (I’ve already made the changes from
http://www.mail-archive.com/[email protected]/msg14463.html).
Also,
receiving and transmitting from a single daughterboard work just fine on
my
peer’s installation.

Thanks!
Rob

Eric B. wrote:

stream of complexes. (Yes, the interface is a bit strange and ought
fg.connect(interleaver, u)

different approach? if yes how to load it to the USRP.

http://lists.gnu.org/mailman/listinfo/discuss-gnuradio


View this message in context:
http://old.nabble.com/transmitting-two-independent-Signals-tp9062991p26383914.html
Sent from the GnuRadio mailing list archive at Nabble.com.

Hi -
Just wanted to say that I found out what was wrong. In the code below,
self.dst.db[0][0] was the issue when using the new GNU Radio version. I
had
to change the code to: self.dst.db(0)[0] in order for it to run
properly… perhaps this was a python issue?
Thanks!
Rob

Robert M. wrote:


Also, receiving and transmitting from a single daughterboard work just

hi all,

d’board

reading some of the forum questions, we understand that the gnuradio
thanks,


View this message in context:
http://old.nabble.com/transmitting-two-independent-Signals-tp9062991p26399486.html
Sent from the GnuRadio mailing list archive at Nabble.com.

Eric B. wrote:

On Fri, Feb 23, 2007 at 10:17:21AM +0100, anmar wrote:

functionality in the FPGA. [In “two independent real signal mode” you
Eric

The fm_tx_2_daughterboards.py code is about the simplest code that
transmits on two daughterboards. What part of it do you have
questions about? Do you understand how to transmit on a single
daughterboard?

Eric

hi Eric!
Tanks for answering!!!
We got some questions left about the code “fm_tx_2_daughterboards” we
hope you can help us understand the following functions:

dac.rate

usrp_interp

interp_rate

usrp_rate

sample_rate

interleave

what are the influences of these function on the output frequencies, or
the frequencies in general.

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