Suggestion for improvement on USRP

Hi, all,

Having enjoyed GNU Radio for several months, I’ve got two ideas to make
improvement on USRP.
As I know, making daughterboard synchronized to the mother boards and
the
synchronization of several motherboard will need a little modification
to
the boards. That is to change the locations of some resistors and
capacitors.
In the further revison of USRP, I think it’s better to place some
jumpers on
boards for setting clock ralations between the boards. That’ll be much
more
convenient.

Another suggestion is that USB 2.0 is not fast enough for some
application.
Maybe in the future, It can be replaced by faster interface such as
Gigabits
Ethernet, 1394 or even PCI iterface.

On Sunday 29 October 2006 00:00, hanwen wrote:

more convenient.

Another suggestion is that USB 2.0 is not fast enough for some application.
Maybe in the future, It can be replaced by faster interface such as
Gigabits Ethernet, 1394 or even PCI iterface.

Just another note to fill the wish list:

Place LED’s at the edge of the board where they can be observed easily.
The
current design hides the LED’s below the daughter boards and are hard to
observe.

cheerio Berndt

Are there plans to update the hardware significantly?

Another suggestion is that USB 2.0 is not fast enough for some application.
Maybe in the future, It can be replaced by faster interface such as
Gigabits Ethernet, 1394 or even PCI iterface.

Firewire 800 or gigabit ethernet would probably just be a marginal
improvement over the current USB2.0 implementation, but I’ve noticed
some real neat developments in PCI-Express bridges. Specifically, PLX
offers a localbus-to-PCI-Express interface that could easily couple
over to an FPGA. Morever, everything is pretty open - down to the
gerbers.

http://www.plxtech.com/products/expresslane/pex8311.asp

The downside is that it’s a BGA package. I know Ettus does this stuff
all himself, but I have seen some successful BGA placements using the
toaster-oven-reflow technique.

If BGA’s are in the mix, I might also suggest moving from an Altera
device to a Xilinx device for a few reasons. First, the Xilinx
WebPack software is free to run under windows or under linux.
Secondly, the SRL16 structure in the Xilinx FPGA’s really bode well to
streaming applications without using flops. Using those can really
give a 4x reduction in flop usage in heavily streamed applications.

So really - are there plans for a new and improved USRP?

Brian

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