On 11/29/2010 01:00 PM, bob beckwith wrote:
I’m currently confronted with a sample rate vs. symbol time issue.
I noticed that the E100 announcement mentioned a “flexible clocking”
feature to deal with exactly this type of thing. I’ve been looking on
the Ettus site for more information, but haven’t been able to locate any.
Is there any more info to be had here?
Unfortunately, we have not really documented this yet. There are a lot
of possibilities, so I will attempt to explain them here.
There are 2 different modes. We’ll call them VCO mode and VCXO mode.
You select which mode you are using with 2 jumpers on the board. In
both modes you can lock either to an external reference or to the
onboard 10 MHz TCXO (which has about 1-2 ppm accuracy). The external
reference can be just about any frequency you like, but is typically 10
MHz. In both modes, the maximum master clock rate is 64 MHz.
In VCXO mode, the master clock comes from an on-board VCXO
(voltage-controlled crystal oscillator). In this mode the master clock
frequency for the system is equal to the frequency of the VCXO (or an
integer division thereof). The E100 comes with a 61.44 MHz VCXO (a good
frequency for UMTS), but you can replace it with another frequency
easily since the footprint is an industry standard 5x7 VCXO package.
In VCO mode, the master clock comes from the VCO inside the AD9522-4
clock generator chip. Without getting into too much detail, this allows
you to get a master clock of just about any frequency you would like
below 64 MHz. The limitation is that some frequency choices will have
better phase noise than others. In general, frequencies that are a
multiple of 250 kHz will have very good phase noise. For others you’ll
have to do the math to figure out if there are “good factors” you can
use.
If you have questions about specific frequencies I can tell you if they
will work well. Otherwise you can look at the AD9522-4 data sheet.
If you need a frequency which does not work well in VCO mode, your best
bet is to use a VCXO at that frequency. For example, 61.44 MHz does not
work well in VCO mode, and that is why we supply the 61.44 MHz VCXO.
Also, will the N210 incorporate this feature?
No, the N210 clocking uses a VCXO at 100 MHz. You can replace that VCXO
with some other frequencies, but that involves soldering. We are
looking at putting a resampler in the FPGA, but that is some time off.
And on a different but related front, sample rate wise it looks like the
Crystek CVHD-950-122.880 would be a good candidate for use as a
replacement oscillator on the USRP2. Has anyone had any luck with this
part? Any timing issues I should be aware of? It looks as though the
clock generator chip shouldn’t have a problem with it.
That VCXO should be fine, but you may have trouble meeting FPGA timing
on the USRP2, unless you divide it by 2. It will be a little easier on
the N210.
Matt