Hi,
i’m working on to calculate RSSI value via software. I’m using various
methods
which give me the same result, but it depends on decimation value. The
behaviour is not linear changing decimation factor:
decimator RSSI
28 220.18217468
30 354.19775391
32 562.27972412 *
34 3.6457119 *
36 5.1297369
…
62 225.86129761
64 282.75350952 *
66 1.99166834 *
68 2.27621746
…
128 141.76763916 *
130 1.34817326 *
there is a relationship but i don’t understand. Could Someone explain
that?
From Gnuradio discussions I noticed that RSSI value can read from output
AUX
ADCs by means of method “u.read_aux_adc(1,0)”, but where has this value
calculated using RFX2400 / FLEX900 (on board)? I don’t find it on
schematic
block.
Is there a method to calculated RSSI on FPGA before DDC and Decimation
Filter?
Thank you very much.
Giuseppe Pilla