I am a bit confused about RSSI calculation.
In the given verilog code at
I can see RSSI is defined by 16 bits.
But in usrp_prims_common.cc, function usrp_read_aux_adc,
*value = ((v_hi << 2) | ((v_lo >> 6) & 0x3)) << 2; // format as 12-bit
the value is only assigned by 12 bits. I though the value is RSSI. But
it contradicts with format given in the verilog code. Or value is not
Any help is appreciated.