RFX2400 intermediate frequency

I am using RFX2400 daughter board with USRP2.
I read on one of the discussion-threads that RFX2400 down-converts to
10Mhz; and the DDCs on the USRP2 FPGA downconverts it further.
So, for example if I use a decimation factor =4; then I would get my
spectrum-of-interest centered around 2.5Mhz. Is that correct?

Mrudula Karve wrote:

I am using RFX2400 daughter board with USRP2.
I read on one of the discussion-threads that RFX2400 down-converts to
10Mhz;

about the IF of rfx2400, by referring to the diagram in
http://gnuradio.org/redmine/wiki/gnuradio/UsrpRfxDiagrams i think it is
20Mhz if i am not mistaken. please correct me if i am wrong. may i know
where do you get the reference which said that it is 10MHz? I really
interested to see to confrm my understanding.


Mohd Adib Sarijari
Universiti Teknologi Malaysia
www.fke.utm.my
www.utm.my

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On Sat, Jun 05, 2010 at 07:34:46AM -0700, adib_sairi wrote:

about the IF of rfx2400, by referring to the diagram in
http://gnuradio.org/redmine/wiki/gnuradio/UsrpRfxDiagrams i think it is
20Mhz if i am not mistaken. please correct me if i am wrong. may i know
where do you get the reference which said that it is 10MHz? I really
interested to see to confrm my understanding.

The IF == 0 Hz. The RFX boards produce quadrature analog which is
then digitized using two ADC’s, one for I and one for Q.

Eric

Eric B. wrote:

The IF == 0 Hz. The RFX boards produce quadrature analog which is
then digitized using two ADC’s, one for I and one for Q.

Eric

thanks for the fast response Eric =) but in the documentation by firas
abbas
in page 9
(http://rapidshare.com/files/121692530/USRP_Documentation.pdf), it
said that the DDC is downconverting the signal from IF to baseband. so
when
the signal digitize by the ADC, it is still in IF right? its mean the
daughterboard is responsible to downconvert the on air received signal
to
the IF signal. the ADC will sampled the IF signal and pass it to the DDC
then the DDC will downconvert the IF to the baseband plus slowing it
down so
that it can be transferred trough the USB 2.0 bus… am i right? plus
what
about the diagram that i give just now
(http://gnuradio.org/redmine/wiki/gnuradio/UsrpRfxDiagrams) in the
diagram
it show that ADC is sampling a signal which is filtered by a 20MHz low
pass.
so the IF signal is still at 20MHz right? please correct me if i am
wrong…
thank you very much for the help =)


Mohd Adib Sarijari
Universiti Teknologi Malaysia
www.fke.utm.my
www.utm.my

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> it show that ADC is sampling a signal which is filtered by a 20MHz low pass. > so the IF signal is still at 20MHz right? please correct me if i am wrong.. > thank you very much for the help =)

The DDCs are only used if the front-end RF can’t tune to the exact
frequency requested by the user. The DDCs are capable of doing a
final digital mixing (from a low IF, typically) to center the
bandwidth of interest at DC, but these aren’t used with all
daughterboards.

So, in the case of RF daughterboards that employ quadrature
downconversion, and are able to tune to the exact frequency of
interest (i.e., downconvert the RF bandwidth to center it at DC),
there is no IF. The A/D converters are simply digitizing the baseband
signal, with one A/D digitizing the I channel, and one digitizing the
Q channel. Google for “zero IF receiver” and you’ll find more
details.

The 20 MHz low-pass filters are there to reduce wideband noise, and to
help with anti-aliasing. They don’t imply that there is a mandated 20
MHz IF.


John O.
CEO/System Architect
Epiq Solutions

John O. wrote:

interest (i.e., downconvert the RF bandwidth to center it at DC),
John O.
CEO/System Architect
Epiq Solutions
www.epiq-solutions.com

oh thank you John for the explanation. thats mean the AD8347 will
convert
the signal to the baseband and output the I/Q signal to the ADC. then
ADC
will convert the signal to the digital domain. in this case the DDC is
only
for decreasing the frequency of the digital sample so that it can be
transfer trough usb 2.0 which have the bottleneck at 32Mhz am i correct?


Mohd Adib Sarijari
Universiti Teknologi Malaysia
www.fke.utm.my
www.utm.my

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> > oh thank you John for the explanation. thats mean the AD8347 will convert > the signal to the baseband and output the I/Q signal to the ADC. then ADC > will convert the signal to the digital domain. in this case the DDC is only > for decreasing the frequency of the digital sample so that it can be > transfer trough usb 2.0 which have the bottleneck at 32Mhz am i correct?

Sounds right to me.


John O.
CEO/System Architect
Epiq Solutions