Dear all,
USRP2 FPGA can be reprogrammed and u2_rev3.bin will be generated and
wrote to the SD card.
How about reprogramming the CPLD? Any advice on programming CPLD?
Please help.
Thanks
Dear all,
USRP2 FPGA can be reprogrammed and u2_rev3.bin will be generated and
wrote to the SD card.
How about reprogramming the CPLD? Any advice on programming CPLD?
Please help.
Thanks
Dear Matt,
Thanks a lot for your reply.
I have Xilinx 10.1 installed (ISE, chipscopeā¦).
I also have a Xilinx USB platform cable 2 which is connected to both
USRP2 and my PC.
So can you help to identify the programming process:
I modify boot_cpld.v and implement it with Xilinx
I configure USPR2 CPLD through the USB platform cable 2 with the
newly generated files.
My question is:
boot_cpld.jed or boot__cpld.bin?
Thanks a lot!
Regards,
On 05/01/2010 02:48 PM, utsu nn wrote:
Dear all,
USRP2 FPGA can be reprogrammed and u2_rev3.bin will be generated and
wrote to the SD card.How about reprogramming the CPLD? Any advice on programming CPLD?
Please help.
Thanks
You will need a JTAG programmer. J203 fits the Xilinx platform cable,
but you can connect directly to the pins if you need. See the USRP2
Configuration page of the schematics.
Matt
On 05/02/2010 01:54 PM, jimmy nu wrote:
- I configure USPR2 CPLD through the USB platform cable 2 with the
newly generated files.My question is:
- which file I need to use to reprogram the CPLD?
boot_cpld.jed or boot__cpld.bin?
The .jed file is what is programmed into the device. I think the .msk
file is important to have as well.
- Which tool I need to use to download the file to program the CPLD?
Xilinx Chipscope?
No, you use Impact.
Matt
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