i hve 2 questions
There some registers 32 of the which are common registers 64 to 79 are
what I understood all of them are written that is set from the host.
of them is read from host. Is there any way by which I could communicate
some message to host from FPGA.
If it is, then will the host need to pull the message…i mean keep
or is it pushed from the USB controller may be by raising an interrupt.
I wish to implement 2 buffers for one tx path on the FPGA. this could be
done by putting multiplexer and demultiplexer across the buffers and
the needed one by setting the line select lines.
Am thinking of doing this by configuring the user defined registers to
the line selects.
my qestion is can we access those registers from time to time and set
reset them as and when needed? or is it just at the start only so that
they are set thats the final?
am attaching a rough sketch of intended design.