Regarding the sample usrp project

Hello,

I have a few doubts.

  1. What is the use of the following .rbf files?
    std_4rx_0tx
    std_2rxhb_2tx
    multi_2rxhb_2tx
    I get the purpose from the names itself, but I want to know if there is
    some
    relevant documentation on this. Also, where are the source codes(verilog
    codes) of these .rbf files?

  2. If we program the FPGA with the usrp_std.rbf file that we generate
    from
    the usrp_std.v code, what purpose does it serve? I want to know if this
    is
    the standard configuration and pin assignment of the FPGA.

  3. When we program the FPGA using python programs(eg. usrp_fft.py), are
    the
    same .rbf files generated? If yes, where?

Thanks a lot.

Regards,
Kuntal

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On Mon, Apr 16, 2007 at 06:11:26AM -0700, Kuntal wrote:

Hello,

I have a few doubts.

  1. What is the use of the following .rbf files?

std_4rx_0tx implements 4 Rx channels without half-band, 0 tx channels
std_2rxhb_2tx implements 2 Rx channels w/ half-band filter, 2 tx channels
multi_2rxhb_2tx experimental code that slaves two USRP together on receive

I get the purpose from the names itself, but I want to know if there is some
relevant documentation on this. Also, where are the source codes(verilog
codes) of these .rbf files?

The std_* are all generated from the same body of code in
usrp/fpga/toplevel/usrp_std/usrp_std.v. The differences between them
is which line of config.vh is uncommented. Same story on mult_* only
that code lives in usrp/fpga/toplevel/usrp_multi/*

  1. If we program the FPGA with the usrp_std.rbf file that we generate from
    the usrp_std.v code, what purpose does it serve? I want to know if this is
    the standard configuration and pin assignment of the FPGA.

If you ran quartus on the code checked into svn, you generated the
equivalent of std_2rxhb_2tx.rbf. The output of the quartus
compilation is called usrp_std.rbf.

All of the quartus project files use exactly the same pin assignments.

  1. When we program the FPGA using python programs(eg. usrp_fft.py), are the
    same .rbf files generated? If yes, where?

The files aren’t generated, they are loaded. By default, an rbf is
loaded from /usr/local/share/usrp/rev{2,4}. The one used unless you
specify the fpga_filename constructor argument when instantiating a
usrp source or sink is std_2rxhb_2tx.rbf. FYI, we load std.ihx,
standard firmware for the Cypress FX2 USB controller, before loading
the FPGA .rbf file. We load the FX2 firmware over the USB. That
firmware implements additional control endpoint commands, including
those that know how to load an .rbf into the FPGA.

Thanks a lot.

Regards,
Kuntal

Eric