-
Has this configurable bit-width revision been merged? I could not
see
the rx_buffer.v modifications in 3.2.2 nor any modifications towards
this
feature on the host side. -
Is there any branch doing the required modifications on the host
side? I
want to decide on whether to revisit my non-working host side
modifications
that I left several months ago
Thanks in advance,
Best regards,
Nagaraj
On Thu, Feb 05, 2009 at 04:47:08PM -0500, Paul C. wrote:
- For whoever is interested, I have a branched revision of the USRP1 FPGA *
- code ready that supports 16, 8, 4, 2, and 1-bit quantization. The *
- Verilog code is available for review in my developer’s branch of the GNU *
- Radio SVN repository here:*
**- http://gnuradio.org/svn/gnuradio/branches/developers/pcreekmore/quantization/usrp*
Thanks Paul!
Eric