Dear Marcus,
At the receiver USRP, does the SBX daughtercard have any mechanism of
phase-lock-loop (PLL) ?
I guess the daughtercard should have it because PLL is essential for
quadrature downconversion.
Please advise, thanks.
Regards,
activecat
On Sat, Jan 11, 2014 at 1:19 PM, Marcus L.
[email protected]wrote:
complex input.
This means both I and Q data are fed into the USRP from the PC. Then the
I and Q data are sent to the SBX after DUC.
If SBX just perform plain analog upconversion, does it mean that I and Q
are upconverted to different carrifer frequencies?
Please advise, thanks.
Regards,
activecat.