Re: Help with Verilog: write_count

Message: 4
Date: Mon, 20 Nov 2006 08:15:50 -0800
From: Eric B. [email protected]
Subject: Re: [Discuss-gnuradio] Re: Help with Verilog: write_count
To: seph 004 [email protected]
Cc: [email protected]
Message-ID: [email protected]
Content-Type: text/plain; charset=us-ascii

I’m not sure of which max_bytes variable you are referring to.

It’s declared like this in main()

int max_bytes = 128 * (1L << 20);

and it’s used here:

test_output (usrp_standard_tx *utx, int max_bytes, double ampl,
bool dc_p, bool counting_p)
seemingly to determine how many times to run the loop that puts samples
into the write buffer.

Nope. It knows how to deal with only 512 byte packets.
Remember those questions about WR & ~count[8]?

I see. So 512 byte packets represent 256 I and Q 16 bit samples? And if
the FIFO is 4096 bits in capacity, it can only fit 8 packets worth of
samples. So if I told the host to send 128 16-bit samples exactly, that
would come to 2 packets, and my FIFO should only be half full? Sorry
for the silly questions, I just want to make sure I haven’t missed
something. If sending 128 samples exactly is possible, from where could
you achieve this if not via the max_bytes variable?

If you’re patient, the in-band signaling plus mblocks that we’re
talked about on the list will get you closer. All of this is unlikely
to come together until sometime in Q1. Good progress is being made
on the mblocks, but we have yet to actually start refactoring all the
USRP host and verilog code.

The m-block stuff does sound exciting, and may solve some issues I’m
having. I’ve lost a lot of time already though, so I have to press on
with this.

Good luck!