Re: FSK4 Demodulation on the FPGA

GNU Radio
1

Hey all,
Has anyone attempted to implement a C4FM demodulator on the Altera
Cyclone in the USRP1? Right now I’m hoping to do this to read
P25 encrypted packets on the FPGA instead of on the CPU, and I
wanted to know if it was possible. If so, could anyone could
point me to any sort of examples or tutorials I could learn
from to accomplish this? It would be greatly appreciated.

Kevin

We’ve got this working - although at present the code runs in the PC as
a GNU Radio application.

Assuming you want a receiver implementation that’s entirely USRP based,
you would also need some other blocks in addition to the C4FM demod
block -

  • channel selection, downconversion to zero IF
  • decimation
  • FM demod
  • post-demod filtering (i.e., RRC filter)

No idea if there is sufficient gate array capacity in the FPGA to
implement all this, or not.

Anyway, here are a few links to get you started

You would be most welcome to join the op25-dev group also.

Best of luck

Max

2

Max,

Thanks so much for your quick response. As it turns out, I’m already
part of the op25 yahoo group, and I’ve seen the good work the op25 group
has done. However, like you said, I am looking for an implementation
that’s entirely USRP based. I am only looking to be able to get the
demodulated symbols on the USRP rather than doing it on the PC. Would I
need to implement all of the blocks you mentioned -

  • channel selection, downconversion to zero IF

  • decimation

  • FM demod

  • post-demod filtering (i.e., RRC filter)

  • to accomplish this?

Kevin