Questions about RAW ethernet driver, UHD and firmware

GNU Radio
1

Hi list,

My name is Nemanja and I am working on my master theisis
using USRP2 with XCVR2450, using Ubuntu 10.04 and gnuradio 3.3.0.
However, I am new to GNU radio and I need help to
understand some basic things in order to continue. I tried the
gnuradio-wiki,
mailing lists and google with no success. I would be very thankful if
somebody
could enlighten me.

  1.  I

want to implement some extra things in FPGA, by adding some extra
features with
Xilinx ISE 12.4 in the current FPGA image.

However, on the link:
http://code.ettus.com/redmine/ettus/projects/public/wiki/U2binaries,

Raw Ethernet Driver and Universal
Hardware Driver are mentioned. I have read that UHD is the recommended
one.

  • WHAT IS THE DIFFERENCE between
    these two, WHAT ARE THEY USED FOR and HOW CAN ONE USE THEM?

2 ) On the link:
http://gnuradio.org/redmine/projects/gnuradio/wiki/USRP2GenFAQ

there is a small list of some important trunk USRP2 code
which is recommended for reading in order to understand USRP2
architecture,
configuration and operation.

Quote: In the FPGA code, the tx_control.v and rx_control.v show inband
signalling, dsp_core_rx and dsp_core_tx show the DSP, and u2_core.v is
the top level.

In the firmware, start with txrx.c.

WHERE CAN I FIND THESE FILES?

WHAT IS AND WHAT DOES THE FIRMWARE DO, IN THIS CASE?

ISNT THE FIRMWARE GLUED TOGETHER WITH FPGA IMAGE IN
THE SD CARD ON SOME WAY?

I would really appreciate your help!

Thanks in advance!

Best regards,

Nemanja Trecakov

2

Thanks Marcus,

I used your script which installed all the prerequisites, downloaded and
installed the source code for newest version of Gnu radio and UHD,
together with the newest pre-built images of FPGA and firmware. The last
two mentioned were to find in usr/local/share/uhd/images.

The mentioned trunk files were also to be found in the UHDs’
sub-directories ‘firmware’ and ‘fpga’.

Regarding the firmware and FPGA image, here is how I understood it:

  • There are to images flashed on the SD card, firmware and FPGA image.
  • The firmware image configurates the FPGA pins and “constructs” “Soft
    CPU”, now ZPU, which handles the communication
    and operations with other hardware on the board, BUT NO DSP.
  • On the other side, the FPGA image configurates the rest of the FPGA
    for high-speed DSP.

Correct?

One thing left unclear - Is the “Soft CPU” present in FPGA by
fabrication, or is it just our choice of “constructing” it by
programming FPGA to “construct” one?

Thank you in advance,
Nemanja

3

Yes, you understood my question right. Now I understand what a soft CPU
is.

Thanks again Marcus!

4

On 07/13/2011 06:35 PM, Nemanja Trecakov wrote:

Regarding the firmware and FPGA image, here is how I understood it:

  • There are to images flashed on the SD card, firmware and FPGA image.
  • The firmware image configurates the FPGA pins and “constructs” “Soft
    CPU”, now ZPU, which handles the communication
    and operations with other hardware on the board, BUT NO DSP.
  • On the other side, the FPGA image configurates the rest of the FPGA
    for high-speed DSP.

Correct?
Yes, that’s correct.

One thing left unclear - Is the “Soft CPU” present in FPGA by
fabrication, or is it just our choice of “constructing” it by
programming FPGA to “construct” one?
I think what you’re asking here is whether the ZPU is a so-called “Hard
Macro”. No, it isn’t.
The ZPU is part of the FPGA image ,and the firmware is the code that
runs on this “soft” CPU.
Previously, the USRP2 used the aeMB soft-cpu, but it was found that
ZPU consumed fewer resources,
and still had everything needed to handle all the necessary
“supervisory” functions of the USRP2/N2XX
family devices.