Hi,
I’m trying to understand how to implement QPSK demodulator on USRP2
FPGA. Is there any recommended document explaining about the chain of
DDC, frequency recovery sync(Costas loop) and symbol sync (Mueller &
Muller)?
Best Regards,
PN
Hi,
I’m trying to understand how to implement QPSK demodulator on USRP2
FPGA. Is there any recommended document explaining about the chain of
DDC, frequency recovery sync(Costas loop) and symbol sync (Mueller &
Muller)?
Best Regards,
PN
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