Problem on write fpga reg

Hi all,

I’m working on a synchronization block to allow the transmitter and
receiver to co-locate on the same motherboard and work alternatively,
transmitter working for 0.5 second then receiver working for 0.5 second,
and then repeat this process.

I’m using USRP1 and LFTX/RX to develop my transmitter and receiver,
which work well when transmitter and receiver are plugged on two USRP1
mother board.

I’m trying to write fpga register FR_MASTER_CTRL to enable transmitter
board or receiver board every 0.5 second, in order to implement tx and
rx working alternatively. The functions defined for enabling tx and rx
is shown as followed.

def write_mode(self):
self._u._write_fpga_reg(FR_MASTER_CTRL, self.mode)

def enable_tx(self, value):
if value:
if self.verbose:
print “Enabling transmitter.”
self.mode |=bmFR_MC_ENABLE_TX
self.transmitting = True
else:
if self.verbose:
print “Disabling transmitter.”
self.mode &=~bmFR_MC_ENABLE_TX
self.write_mode()

def enalbe_rx(self, value):
if value:
self.mode |=bmFR_MC_ENABLE_RX
self.write_mode()
self.rcvr.start()
self.receiving = True
else:
self.rcvr.stop()
self.mode &=~bmFR_MC_ENABLE_RX
self.write_mode()
self.receiving = False

def start(self):
if self.tx:
self.enable_tx(True)
if self.rx:
self.enable_rx(True)

However, i got an AttributeError

File “/home/john/gnuradio/gr-iono/usrp_ionsonde_control.py”, line 197,
in set_reset
self.write_mode()
File “/home/john/gnuradio/gr-iono/usrp_ionsonde_control.py”, line 166,
in write_mode
self._u._write_fpga_reg(FR_MASTER_CTRL, self.mode)
File
“/usr/local/lib/python2.5/site-packages/gnuradio/gr/hier_block2.py”,
line 50, in getattr
return getattr(self._hb, name)
AttributeError: ‘gr_hier_block2_sptr’ object has no attribute
‘_write_fpga_reg’

What’s the problem may be? Could this fpga reg be written every half
second or even 20 microseconds?

Thank you so much for help.

Yan

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