Please tell me the phase stability of 100MHz clock in USRP2 when the
100MHz clock is locked to an external 10MHz reference signal.
I have measured the temporal variation of phase difference between two
USRP2 outputs when a 10MHz signal is fed into PPS IN ports of two
USRP2s. The input signal of each USRP2 is fed by a same oscillator where
the output frequency is set to 26MHz. The result indicates the phase
difference varies from 0 to 2pi radians in about 100msec. This similar
result is obtained in the case a 10MHz signal is not fed into PPS IN
port. I think this observed temporal variation of phase difference is
too rapid, therefore, suspect the 100MHz clocks are unlocked to the
external 10MHz signal.