"Open-Hardware"

GNU Radio
1

First, let’s change the topic. This is overdue.

schrieb Moeller on 2011-01-11 07:21:

On 10.01.2011 02:22, Marcus D. Leech wrote:

The SSRP, as far as I can tell, is dead. Last status update was nearly 4 years
ago.

The development stopped apparently. But at least he has a working design for the
RX part.

o The ADC board (single-channel, thus cannot handle direct-conversion with I
and Q sampling) $120.00

o Uses an Off-The-Shelf ElraSoft FX2 board, which in 2007, sold for $89.00

Oh, forgot about the USB interface, so it’s about $200. That would be my limit
for a home-product.

As I said before, I think the Elrasoft board is more than completely
overpriced. There must be something cheaper out there. Or it has to be
created. I could imagine that an Open Source EZ-FX2 with voltage
regulator and a set of sensible connectors would be a great tool for a
lot of people.

For comparison:
The Arduino costs like 25

2

First, let’s change the topic. This is overdue.
Agreed

You need the decimation on the device side of the USB connection to
reduce the amount of data sent over it. The absolute limit isbetween 32
an about 40MiByte/sec. Divided by 16bit=2byte per sample is 16-20MSPS
real-valued or 8-10MSPS complex-valued. Either you reduce the sampling
rate or you decimate. That rate should be more than sufficient for all
but the most demanding experiments. The only common interesting signals
that need more bandwidth are TV (6-8MHz), GPS (2-20MHz?), WLAN (20MHz),
All of them in higher bands, where mixing the signal down into the ADC
frequency range would be needed.
For certain classes of high-bandwidth applications, you’re willing to
sacrifice
number of bits for bandwidth.

My application (radio astronomy, in particular in-the-noise-floor
radiometry) can easily get away
with 4 bits I and 4 bits Q. Which means that you might be able to
squeeze 40MHz of bandwidth
out of a USB interface using reduced sample sizes. I think it’s
worth doing right from the outset,
rather than hacked-in later on. Bit reduction doesn’t need to be
fancy, just grab the high order N
bits of the samples and pack them into a byte stream, and chuck that
bytestream out the interface
packaged appropriately. User gets to say what N is, with N perhaps
being chosen from {2,4,8,16},
in order to make the byte-packing easier/cheaper.

the FX2 has an external FIFO interface, intended to handle storage
devices, but interfacing to a high-speed
dual-channel-simultaneously-sampled ADC shouldn’t be that hard–might
require an uber-cheap CPLD to
handle some of the handshaking.

An other way would be to change the interface, which would very likely
be Gigabit-Ethernet.

I haven’t found a “cheap” way of doing GiGe. Not nearly as cheap as
USB-2.0 chips capable of
doing storage-class transfer rates (like the FX2 used on the USRP1).
Most of the GigE controller
chips are designed for PCI, very few are designed for embedded, which
is why most embedded
applications use a GiGE MAC “hard macro” (or soft) in an FPGA
implementation, with an external
PHY. One project I worked on had 4 instances of the Xilinx TEMAC in
our Virtex 5 FPGA, and a
hideously-complex Broadcom 4-port PHY. Shudder. I need a drink :slight_smile:
:slight_smile:

–
Marcus L.
Principal Investigator
Shirleys Bay Radio Astronomy Consortium

3

Another thought I had earlier today is that with UAC2 (USB Audio Class
version 2), there’s no limit on the sample rate that a UAC2 device
can advertise, so it might be nice to make a USB-SDR device “appear”
to be a UAC2 compliant device. [Well, OK that’s not strictly
true, you can advertise up to something like 400Msps].

Perhaps we can overload the control interface a bit (volume control
becomes RF gain, use some other thingy in the control portion of
UAC2 for setting frequency).

There’s already SDR-Widget, and perhaps they can be brought into
this–that is the aims of the SDR-Widget folks and the “cheaper
hardware”
Gnu Radio folks have some significant overlap.

–
Marcus L.
Principal Investigator
Shirleys Bay Radio Astronomy Consortium

4

schrieb Marcus D. Leech on 2011-01-12 01:44:

Another thought I had earlier today is that with UAC2 (USB Audio Class
version 2), there’s no limit on the sample rate that a UAC2 device
can advertise, so it might be nice to make a USB-SDR device “appear”
to be a UAC2 compliant device. [Well, OK that’s not strictly
true, you can advertise up to something like 400Msps].

Perhaps we can overload the control interface a bit (volume control
becomes RF gain, use some other thingy in the control portion of
UAC2 for setting frequency).

You just ad a second interface that is HID, which is available on every
platform and easy to handle. That’s how all the soundcard-like DDS do
it.

The only problem is that Microsoft promised in 2005 to implement UAC2,
but “forgot” to do it until now. BTW they have a big mess with USB, as
Daniel Mack, Linux UAC2 author wrote: “Inevery cruel reincarnation of
their OS, it has different issues.” I spare you the terrible details an
leave out the rest of his summary.

I read the UAC1 specs a year ago and thought “Great, you can advertise
up to 4MSPS on USB Audio!”, but it turned out that it was specified for
USB 1.1, which just cannot handle the data rates. :frowning: Then I found the
SDR Widget, and they really get everything out of the Windows UAC1
driver.

Regards

Patrick

5

schrieb Marcus D. Leech on 2011-01-12 01:16:

For certain classes of high-bandwidth applications, you’re willing to
sacrifice
number of bits for bandwidth.

For sure. But you have to commit that your usecase is more the corner
case then the mainstream. With your CPLD mentions below this should not
be a big deal.

the FX2 has an external FIFO interface, intended to handle storage
devices, but interfacing to a high-speed
dual-channel-simultaneously-sampled ADC shouldn’t be that hard–might
require an uber-cheap CPLD to
handle some of the handshaking.

AFAIK the SSRP is just shoveling bits from the ADC to the FX2.

An other way would be to change the interface, which would very likely
be Gigabit-Ethernet.

I haven’t found a “cheap” way of doing GiGe.

GiGe is for high end. It adds comlexity on the network and host side
(configuration…) and is IMO unnecessary. Of course you get speedup by
2.5 over USB, but as ham and hobbyist you hardly need all the USB
capacity.

What I’d like to have is something like the Digilent Basys2/Nexys2. A
capable USB interface, some CPLD/FPGA for the hard stuff, maybe a
microcontroller, some memmory, buttons, 7-segment-display, and
connectors like SD card etc. With examples and modules like for the
Digilent parts this would make it easy to start all kinds of projects.
The board are already cheap, but not OS. If it was compatible with the
PMOD module, this gave a good starting point for working strait and for
custom modules like the Charleston SDR. If people agree on a bus,
modules could be stacked: AD module, mixer module, filtering module, LNA
or transmitter module.

Regards

Patrick

6

On Jan 11, 2011, at 5:15 PM, Patrick S. wrote:

The only problem is that Microsoft promised in 2005 to implement UAC2,
but “forgot” to do it until now. BTW they have a big mess with USB, as
Daniel Mack, Linux UAC2 author wrote: “Inevery cruel reincarnation of
their OS, it has different issues.” I spare you the terrible details an
leave out the rest of his summary.

I have to give MS credit for backwards-compatibility, though. As of
Windows 7, they still support mis-identifying a GPS receiver as a serial
port mouse, thus causing all sorts of delightful hijinks with the mouse
pointer.

–
Mark J. Blair, NF6X [email protected]
Web page: http://www.nf6x.net/
GnuPG public key available from my web page.

7

schrieb Marcus D. Leech on 2011-01-12 01:44:
You just ad a second interface that is HID, which is available on every
platform and easy to handle. That’s how all the soundcard-like DDS do it.

Ah, yes of course.

The only problem is that Microsoft promised in 2005 to implement UAC2,
but “forgot” to do it until now. BTW they have a big mess with USB, as
Daniel Mack, Linux UAC2 author wrote: “Inevery cruel reincarnation of
their OS, it has different issues.” I spare you the terrible details an
leave out the rest of his summary.
Well, I personally don’t care very much about random-disk-noise, errr,
I mean Windows,
but I’m sure others do :slight_smile:

I read the UAC1 specs a year ago and thought “Great, you can advertise
up to 4MSPS on USB Audio!”, but it turned out that it was specified for
USB 1.1, which just cannot handle the data rates. :frowning: Then I found the
SDR Widget, and they really get everything out of the Windows UAC1 driver.

I thought you couldn’t do more than 48Ksps with UAC1, no way no how.
Perhaps I should read that spec again, but it seems that UAC2 is the
way forward, with 384Ksps audiophile DACs using UAC2 already becoming
available.

An interesting device is the AD6655, which is an integrated ADC and
signal processing chain (complex DDC, and one or more CIC decimators
and FIR filters). It can produce 4 discrete output channels, but the
“cool” thing is the built-in DDC+etc chain. Doing the BOM math,
going
with something like the AD6655 then straight into the FX2 would be
cheaper
than somewhat-cheaper-highspeed-ADC+FPGA+FX2.

The AD6655 is designed as an (non-zero) IF sampler, and I haven’t read
enough of the
datasheet to determine if it can do simultaneous sampled I/Q with a
quadrature D-C
front-end in front of it. It does have two ADCs, but they’re
intended for diversity
reception, rather than quadrature sampling–it has its own quadrature
converter
inside it.

–
Marcus L.
Principal Investigator
Shirleys Bay Radio Astronomy Consortium

8

On 01/12/2011 02:32 AM, Moeller wrote:

Maybe an FPGA Experimentation kit could be extended with an RF/Sampling part:

$400 price class, includes PowerPC, 64 DSP slices,
Gigabit Ethernet, 64 MB RAM, just RF part and A/D converters are missing:

http://www.eetimes.com/electronics-products/fpga-pld-products/4103784/-395-Virtex-5-FXT-FPGA-evaluation-kit

Ok, not Open-Source hardware, but at least cheaper than USRP2.

There’s also the Xilinx SP601, which has roughly half the number of
logic blocks as the board you
mentioned above, but is also only $249.00. I don’t have a good
intuitive feel for the number of
required logic blocks/LUTs/slices are required for any given task.

–
Principal Investigator
Shirleys Bay Radio Astronomy Consortium

9

On 12.01.2011 00:13, Patrick S. wrote:

You need the decimation on the device side of the USB connection to
reduce the amount of data sent over it. The absolute limit isbetween 32
an about 40MiByte/sec. Divided by 16bit=2byte per sample is 16-20MSPS
real-valued or 8-10MSPS complex-valued. Either you reduce the sampling
rate or you decimate. That rate should be more than sufficient for all

Yes, for home use this rate is quite Ok. I think my PC could handle DDC
and FFT
at this rate, except some more complex operations.

but the most demanding experiments. The only common interesting signals
that need more bandwidth are TV (6-8MHz), GPS (2-20MHz?), WLAN (20MHz),
All of them in higher bands, where mixing the signal down into the ADC
frequency range would be needed.

My interest is to use such a device as a signal analyzer, waterfall
diagram, spectrum analyzer, signal recorder, logic analyzer etc.
At home I could never afford a professional one. At the moment I have
only my old analogous Oscilloscope. But advances in technology …

An other way would be to change the interface, which would very likely
be Gigabit-Ethernet.

Maybe an FPGA Experimentation kit could be extended with an RF/Sampling
part:

$400 price class, includes PowerPC, 64 DSP slices,
Gigabit Ethernet, 64 MB RAM, just RF part and A/D converters are
missing:
http://www.eetimes.com/electronics-products/fpga-pld-products/4103784/-395-Virtex-5-FXT-FPGA-evaluation-kit

Ok, not Open-Source hardware, but at least cheaper than USRP2.

10

On 12.01.2011 09:11, Marcus D. Leech wrote:

http://www.eetimes.com/electronics-products/fpga-pld-products/4103784/-395-Virtex-5-FXT-FPGA-evaluation-kit

There’s also the Xilinx SP601, which has roughly half the number of
logic blocks as the board you
mentioned above, but is also only $249.00. I don’t have a good
intuitive feel for the number of
required logic blocks/LUTs/slices are required for any given task.
I have no experience with such FPGA evaluation kits.
Is there an easy way to attach a RF daughter board and ADC/DAC?
What bus would be suitable, Rocket-IO or some parallel digital ports?
I didn’t find analog ports on the board.

11

schrieb Marcus D. Leech am 2011-01-12 02:40:

Well, I personally don’t care very much about random-disk-noise, errr,
I mean Windows,
but I’m sure others do :slight_smile:

There is a lot of people outside the Linux world, especially in the
non-academic hobbyist corner. These people seem to me to try to work
with least possible changes, that is install no new OS, install no
additional tricky exotic drivers, and at most plug in some USB device.
That’s perfectly ok for me. If these people should be serverd as well
you unfortunately have to to think about Windows, as hard and painful
as it may seem.

I read the UAC1 specs a year ago and thought “Great, you can advertise
up to 4MSPS on USB Audio!”, but it turned out that it was specified for
USB 1.1, which just cannot handle the data rates. :frowning: Then I found the
SDR Widget, and they really get everything out of the Windows UAC1
driver.

I thought you couldn’t do more than 48Ksps with UAC1, no way no how.

You can trick Windows to do 192Ksps via UAC1, I think. No sure if its 16
or 24 bit.

Perhaps I should read that spec again, but it seems that UAC2 is the
way forward, with 384Ksps audiophile DACs using UAC2 already becoming
available.

I can think of a way how the SDR Widget people do it: Different
firmwares for UAC1 and UAC2. With a third for a more generic interface,
this could be compatible and fun at the same time.

An interesting device is the AD6655, which is an integrated ADC and
signal processing chain (complex DDC, and one or more CIC decimators
and FIR filters).

Now that is not exactly the cheap one, but with its 150MSPS it would be
quite a frequency range with low additional effort.

What would be the goal for such a device? Which bandwidth are of
interest, which dynamic ranges? Which frequency ranges? Extra frontends?
IF from other transceivers or transverters? What would you do with it?

Oh, I forgot one interesting device:
http//:www.websdr.org/
Seems the hardware info is not linked any more, but its a DDS board with
Ethernet interface. Very application specific, but all soldered by hand.

Regards

Patrick

Engineers motto: cheap, good, fast: choose any two
Patrick S.
Student of Telemati_cs_, Techn. University Graz, Austria

12

On 01/12/2011 08:17 AM, Patrick S. wrote:

Seems the hardware info is not linked any more, but its a DDS board with
Ethernet interface. Very application specific, but all soldered by hand.

No, it’s not cheap. But because it has built-in DDC+CIC Decimator, you
may not need
a largish FPGA to do the DDC+Decimation, so you trade-off a
more-expensive ADC
against not having an FPGA at all.

In terms of an RF front-end, I’d previously observed that the Rx range
offered by the
WBX covers a very wide “swath” of interesting frequencies for
experimenters,
namely 50Mhz to 2.2GHz. The core of that capability is an ADF4350 PLL
synthesizer, and an ADL5387 quadrature mixer.

–
Principal Investigator
Shirleys Bay Radio Astronomy Consortium

13

schrieb Marcus D. Leech am 2011-01-12 02:40:
There is a lot of people outside the Linux world, especially in the
non-academic hobbyist corner. These people seem to me to try to work
with least possible changes, that is install no new OS, install no
additional tricky exotic drivers, and at most plug in some USB device.
That’s perfectly ok for me. If these people should be serverd as well
you unfortunately have to to think about Windows, as hard and painful
as it may seem.

Yup, I reluctantly agree. But I have to assume that UAC2 is the
“future” of
USB Audio devices, and as such, should probably be the way to go
forward.
I’m pretty sure that the USB consortium didn’t invent UAC2 purely for
LInux users :slight_smile:

Now, to keep ideas ball rolling here:

So, by way of a start on a cheap(ish) receive chain block-diagram, I
whipped-up this:

http://www.sbrac.org/files/digital_receiver2.pdf

This has a “reasonable” RF Rx chain, and includes a “reasonable”
(20Msps) ADC.
The “trick” is that instead of doing decimation in an FPGA, you
select the correct
filter from the bank, and change the ADC clock rate. Discrete
passive filters are
reasonably easy to design and fabricate, and if there are only, let’s
say, four of
them, covering 4 different desired SPS rates, that might be
acceptable.

Also, the design “terminates” in an FMC connector, which allows you to
mate this up with
something like a Xilinx FPGA+1GiGe card, like the SP601 or similar.

If one desired USB instead, then a simple EZ-FX2 USB-2.0 card with an
FMC connector on it, and whatever
logic was necessary to grab samples from the ADC could be designed
and built.

A “wrinkle” in such a design is that one is at the mercy of the tuning
resolution of the down-converter,
since there’s potentially no DDC (unless you implemented one on the
FPGA card).

–
Marcus L.
Principal Investigator
Shirleys Bay Radio Astronomy Consortium

14

On 12.01.2011 20:22, Marcus D. Leech wrote:

http://www.sbrac.org/files/digital_receiver2.pdf

The RF range is interesting, from 70 MHz to 2.2 GHz.
For USRP you would need 2 different boards to cover that range,
or invest much more money into the WBX transceiver.

This has a “reasonable” RF Rx chain, and includes a “reasonable” (20Msps) ADC.
The “trick” is that instead of doing decimation in an FPGA, you select the
correct

If connected to a Xilinx board, FIR and decimation could still be done
in the FPGA.

Also, the design “terminates” in an FMC connector, which allows you to mate this
up with
something like a Xilinx FPGA+1GiGe card, like the SP601 or similar.

This would be a very powerful combination and only $250 for the
mainboard.
With “large” memory 128 MB & DDR2 memory controller, 32 DSP slices,
MicroBlaze processing with MMU and FPU inside a Spartan-6.

If one desired USB instead, then a simple EZ-FX2 USB-2.0 card with an FMC
connector on it, and whatever
logic was necessary to grab samples from the ADC could be designed and built.

There’s a cheap one here, with USB2 and Spartan3, only 70

15

On 12.01.2011 20:22, Marcus D. Leech wrote:
If connected to a Xilinx board, FIR and decimation could still be done in the
FPGA.
Agreed.

16

On 01/12/2011 03:20 AM, Moeller wrote:

I have no experience with such FPGA evaluation kits.
Is there an easy way to attach a RF daughter board and ADC/DAC?
What bus would be suitable, Rocket-IO or some parallel digital ports?
I didn’t find analog ports on the board.

The standard for expansion cards for such FPGA “baseboards” is something
called
FMC (Fpga Mezzanine Card), which is a 68-signal-line standard.

–
Principal Investigator
Shirleys Bay Radio Astronomy Consortium

17

If one desired USB instead, then a simple [Cypress] EZ-FX2 USB-2.0
card with an FMC connector on it, and whatever logic was necessary
to grab samples from the ADC could be designed and built.

By the way, USB3 is now hitting the mainstream, with PCI boards,
motherboards, disk drives and USB sticks from all the major vendors.
It provides a significant bandwidth boost over USB2 (it’s designed for

3Gbits/sec, both ways simultaneously). This would be very useful to
any newly designed USRP-like device.

I haven’t investigated what chips could replace the EZ-FX2 in a USB3
USRP. Oddly, the Cypress site seems to know nothing about USB3
devices!

John

18

By the way, USB3 is now hitting the mainstream, with PCI boards,
motherboards, disk drives and USB sticks from all the major vendors.
It provides a significant bandwidth boost over USB2 (it’s designed for

3Gbits/sec, both ways simultaneously). This would be very useful to
any newly designed USRP-like device.
I agree that it’s worth considering, I think it has extended range as
well. Competing very firmly with
GiGe!

I haven’t investigated what chips could replace the EZ-FX2 in a USB3
USRP. Oddly, the Cypress site seems to know nothing about USB3
devices!

John

Yes, I found that same thing. Seems odd that Cypress wouldn’t be one of
the front-runners for
USB-3.0.

I will point out that one of the enticing things about 1GiGe is that you
can run it over extended distances.
Which for me is very interesting, since you could put a receiver at
each antenna (think Alan Telescope Array),
and haul signals back via 1GiGe. With USB-2.0, you can’t do that
without a funky device like the ICRON Ranger
series (which inside, just re-packages USB-2.0 over 1GiGe, as far as
I know).

–
Marcus L.
Principal Investigator
Shirleys Bay Radio Astronomy Consortium