On Fri, Jun 01, 2007 at 09:27:55AM -0400, [email protected] wrote:
Excellent. Just so I understand how this is done- when one tunes
different subdevices to different frequencies, is there one LO on the USRP
which is being switched between these frequencies, or is there more than
In general, the tuning is split between an LO on the daughterboard and
the DDCs in the the FPGA. In the case of the Basic Rx and LF RX,
there is no LO on the daughterboard, so all the tuning is handled by
the DDC. When using std_4rx_0tx.rbf, there are 4 DDCs available in
u.tune(…) handles adjusting the LO (if any) and the DDCs
transparently for the common case.
Also- Can I tune all four subdevices independently, or am I restricted to
using the same frequency on a given daughterboard?
With the Basic and LF Rx everything is independent, since there’s no
LO on the daughterboard. In the case of daughterboards with LO’s,
life is a bit more complicated and you’ll have to explicitly control
the LO on the daughterboard, and then explicitly control the 2 DDCs
that are being fed from the given daughterboard. You of course need
to ensure that that two frequencies that you want within the IF
passband of the daughterboard.
To see how this is currently handled, take a look at the
implementation of “tune” in gr-usrp/src/usrp.py
Finally- I would guess that at a minimum the decimation factor set in the
fpga must be the same for all subdevices. Is this correct?
Yes, the decimation rate applies to all subdevices.