What is the serial setting needed to talk to USRP2 UART (Baudrate,
parity,…etc) ?
Is the processing of set_scale_iq done in the host or in the FPGA?
What is the purpose of the AeMB processor? What is its clocking
speed?
Where USRP2 MAC address is stored ?
USRP2 Feedback:
The USRP2 is great (Thank you Matt).
When My PC (OS Ubuntu 8.1) GLAN setting was DHCP (MTU was 672), I had
various errors (Segmentation fault, set_decimation error , send Message
too
long,…etc). All These problems are went away when I used static IP
address (MTU was 1500).
What is the serial setting needed to talk to USRP2 UART (Baudrate,
parity,…etc) ?
230400 baud, 8N1 format
Is the processing of set_scale_iq done in the host or in the FPGA?
The scaling itself is done in the DSP pipeline in the FPGA.
What is the purpose of the AeMB processor? What is its clocking speed?
The aeMB processor is a fully synthesized CPU that forms the heart of
the USRP2 FPGA system-on-a-chip design. It performs configuration and
status reporting for all the FPGA peripherals, manages the control
channel for the GbE transport, and handles RF daughterboard operation.
It doesn’t perform any DSP functions; these are done purely in logic
in the DSP RX and TX pipelines. It is clocked at 50 MHz, half the
system clock rate.
Where USRP2 MAC address is stored ?
It is stored on the USRP2 motherboard EEPROM.
When My PC (OS Ubuntu 8.1) GLAN setting was DHCP (MTU was 672), I had
various errors (Segmentation fault, set_decimation error , send Message too
long,…etc). All These problems are went away when I used static IP
address (MTU was 1500).
Yes, the USRP2 GbE transport currently requires a GbE MTU of 1500
bytes. This may change in the future.
-Johnathan
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