How to solve the USRP overrun problem

Dear all,

I’m modifying the gr-sounder project to transmit a 113-bit legendre
sequence of the bandwith 32kHz and upconvert to certain frequency in the
range 1MHz to 20MHz. At receiver side, the received signal is
downconverted to baseband and store the recovered sequence into a data
file.

I modified the FPGA configuration by using clk_divider to downconvert
the clock, clk64 to 32kHz, and applied the 32kHz to module
adc_interface, sounder,rx_buffer, dac_interface instead of clk64. The
other modules still keep the chip-rate(clk64) as the working frequency.
At the receiver side, I gt rid of the correlation part, made the
receiver directly store the received data into rx_buffer.

The result shows some USRP overrun signs (uO), and the received data is
as shown below:
-1 - 1i
-1 + 0i
0 + 0i
0 + 0i
0 + 0i
0 - 1i
-1 - 1i
-1 - 1i
-1 - 1i
0 + 0i
0 + 0i
0 + 0i
0 + 0i
-1 - 1i
-1 - 1i
-1 - 1i
-1 + 0i
0 + 0i
0 + 0i
0 + 0i

However, the frequency of baseband data should be 32kHz, which doesn’t
exceed the maximum USB data rate 8MHz, why the USRP overrun?

The received data should be the amplitude of the code, 4096, and the
data should be real part only. What is the possible reason why the
received data is as the shown.

Thank you so much!

Regards,
Yan

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