We’re seeing pretty much the same thing on the USRP1 as this:
It seems that there is a very significant roll-off at lower
frequencies on the receive side which pretty much makes it unusable
for our baseband signals.
The aformentioned forum post suggests that it is not caused by the
LFRX board and so is likely to be something in the fpga…
Just to reiterate the questions from this forum post.
What on the FPGA is causing this frequency response? (and what can
we do about it?)
Why does this happen only in the RX path?
And the original poster also wanted to know:
3) According to
“How can I use both A/D converters on the USRP2?”
feeding the signal to RX_B does not give ANY output on the ADC
If anyone can offer any help at all with this it’d be much appreciated.