Gr-radar-mono TX at 64 MHz - and I/Q vector replace RF pulse

Hi all,

I want use USRP as Active Radar. In first time my aim is to emit a RF
pulse at 64 MHz, and receive echo. For this i have read the comment in
“gnuradio/gr-radar-mono/src/fpga/top/config.vh”, the two last lines is:

// Uncomment to enable 64 MHz Tx clock, otherwise 32 MHz
//`define TX_RATE_MAX

but if i uncomment the last line, the bitstream for fpga can be
compiled, but the result is the RF-Pulse don’t exist. It is a bug which
be not reported? One people have use this without problem?

I have test many code for solve this problem, but without victory. I
have test was to rewrite in
“gnuradio/gr-radar-mono/src/fpga/lib/radar_control.v” the line:
assign tx_strobe_o = count[0]; // Drive DAC inputs at 32 MHz
in
assign tx_strobe_o = clk_i; // Drive DAC inputs at 64 MHz?

I have also test to assign the PLL clock at 128 MHz in Input of
cordic_nco in “gnuradio/gr-radar-mono/src/fpga/lib/radar_tx.v”.

But nothing be good.

In second time, i want to send not a single pulse, but I/Q vector at
64 MHz, now i have use register of fpga to transfert the vector that
i want to send. That seem’s be good, but maybe a more simple
solution exist? I think that the best solution was to instantiate an
tx_buffer module in gr-radar-mono, but i have no idea howto
implement this. Nobody have make a similar construction?

Thank's for all, and have a nice day ++

On Sat, May 1, 2010 at 05:13, sam [email protected] wrote:

I want use USRP as Active Radar. In first time my aim is to emit a RF
pulse at 64 MHz, and receive echo. For this i have read the comment in
“gnuradio/gr-radar-mono/src/fpga/top/config.vh”, the two last lines is:

// Uncomment to enable 64 MHz Tx clock, otherwise 32 MHz
//`define TX_RATE_MAX

but if i uncomment the last line, the bitstream for fpga can be
compiled, but the result is the RF-Pulse don’t exist. It is a bug which
be not reported? One people have use this without problem?

This functionality was never successfully debugged. The DAC on the
USRP must be configured to allow being driven at 64 Msps, and if I
recall correctly, doesn’t have the right clock pins in use to do so.

Johnathan

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