FX2 setup / interrupts / genral comms


#1

Hello again,

I’m battling to talk to my FX2 (custom board), under
windows. I use the CyAPI interface to the generic USB
driver supplied by Cypress. I can set LED’s on my
board and so on, so I know that my firmware is being
downloaded.

I started out trying to make use of pre-written
Cypress C files (fx2regs.h, fx2.h etc), and have found
a couple bugs in their code.

Recently, I have been going through the GnuRadio
equivalents and am (sort of) merging the two while
only keeping the simple functionality I am aiming for
(at this stage a simple IN streaming device using the
slave fifo interface)

I have a couple of questions on setting this up (or,
adapting the USRP/SSRP firmware to work)

  1. I don’t have an eeprom on my board to store
    PID/VID, so I am bound to the standard interface
    settings - will this be a problem? i.e. provided I set
    up my EP2 to IN, and EP6 to OUT (matching the standard
    settings wrt buffering etc), can I then just change
    the device’s alternative interface setting to the
    appropriate one and access these endpoints?

  2. I am trying to set up my firmware responses to
    CONTROL requests over EP0. Looking at the USRP code, I
    see that USB interrupts are in autovector mode, with a
    fair bit of code written in assembler. I need to
    translate this into a form that my Keil uVision
    compiler will understand, but once I have done this,
    with the assembler directives (eg isr.asm), the
    appropriate include and source files, will I need to
    set anything else up? (I have commented out all gpif
    or fpga-specific functionality)

  3. Also, do I need to explicitly clear HSNAK and
    perform other house-keeping in the CONTROL ISR’s?

  4. Finally, the next step after sorting out the EP0
    responses will be to make a simple loop-back whereby
    the FX2 intercepts all OUT packets and sends them back
    to the host, so that I can be sure that my firmware is
    ok. Can I simply use ISR’s hooked into the endpoint
    interupts to achieve this?

Many thanks again for your help
Kalen Watermeyer

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#2

On Tue, May 23, 2006 at 08:53:12AM +0100, Kalen Watermeyer wrote:

a couple bugs in their code.
No kidding :wink:

I guess my basic question is why are you using their tools, their
include files, library files, etc, and then asking questions here?

I have a couple of questions on setting this up (or,
adapting the USRP/SSRP firmware to work)

If you used the tools we’re using, you’d be a lot closer to having
something that worked. [Not to say that there isn’t a path to get it
working using their tools, but I haven’t used them.]

  1. I don’t have an eeprom on my board to store
    PID/VID, so I am bound to the standard interface
    settings - will this be a problem?

Is this a “one off” board, or is this something that you plan to build
more than one of? Any particular reason you’re not spending the $0.45
that it takes to allow the board to have it’s own PID/VID?

Also, the standard interface settings have nothing to do with the
PID/VID. After you download code into the FX2, it can look like
pretty much anything.

i.e. provided I set
up my EP2 to IN, and EP6 to OUT (matching the standard
settings wrt buffering etc), can I then just change
the device’s alternative interface setting to the
appropriate one and access these endpoints?

Uhh, you’re trying to get this working under windows, right?
Don’t know how they do it there, but in general, this sounds right.

  1. I am trying to set up my firmware responses to
    CONTROL requests over EP0. Looking at the USRP code, I
    see that USB interrupts are in autovector mode, with a
    fair bit of code written in assembler.

Basically just the glue for the interrupt vectors is in assembler.
The handlers (if used) are in C.

I need to translate this into a form that my Keil uVision compiler
will understand, but once I have done this, with the assembler
directives (eg isr.asm), the appropriate include and source files,
will I need to set anything else up? (I have commented out all gpif
or fpga-specific functionality)

I’m sure the non-free Keil tools have some way to handle this.
If not, you really are getting a raw deal :wink:

  1. Also, do I need to explicitly clear HSNAK and
    perform other house-keeping in the CONTROL ISR’s?

No.

  1. Finally, the next step after sorting out the EP0
    responses will be to make a simple loop-back whereby
    the FX2 intercepts all OUT packets and sends them back
    to the host, so that I can be sure that my firmware is
    ok. Can I simply use ISR’s hooked into the endpoint
    interupts to achieve this?

Beats me. I haven’t tried using endpoint interrupts.

Eric