I noticed that both the usrp.source and usrp.sink blocks have the
specify the .rbf bit file for the FPGA.
Does that mean that in the following:
self.usrp_in = usrp.source_c (fpga_filename=“file_A.rbf”)
self.usrp_out = usrp.sink_c (fpga_filename=“file_B.rbf”)
Only file_B has any effect? When does the file get loaded?