FPGA original firmware problems

Hello list, First I apologise for posting in the Recovering x(t) from IQ
samples thread, please delete my post there if possible. I also removed
my old account from the list and created this new one.
I have recently changed the USRP clock with an external PLL. Then I used
the previously precompiled standard firmware std_4rx_0tx.rbf , using 2
sinusoidal inputs (2.1 MHz) to RXA, RXB with the results confirming that
everything was working fine. I then downloaded the 3.0.4 version and
tried to recompile the usrp_std project. I used the usrp_std.rbf file
produced with the rx_cfile.py, feeding the RXA, RXB each with the same
sinusoidal signal and when I plotted the output I found out that I was
getting 0 values only.
I then used again the std_4rx_0tx.rbf file which resulted in the
expected output (sinusoidal signals at the same frequency) with
amplitudes ranging from -15500 to 15500. . I then used another firmware
which actually produces known data from within the rx_buffer.v file, (a
signal that cycles from 0 to 15 and back to 0) and the output was as
expected again, linear increase from 0 to 15 and then back to 0. I then
tried other versions of the firmware that there were working, as Peter
Monta’s variable width and shift firmware, but again I was getting 0
values at this time.
Does anyone has an idea what might be wrong? Why do I get nothing at the
output when I use .rbf from the recompilation of the usrp_std project?
Why some .rbfs work and some not?
Thank you
Rigas Ioannides

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