FPGA firmware

Hi!

Am I right to state that the fpga firmware is configured as followed:

Tx chain (0 to 2 possible)

  • NCO fine+coarse on Analog Devices Chip
  • low-pass 4x interpolation on AD-Chip
  • CIC interpolation filters, separate for I- and Q-Data

Especially:
Cordic turned off, internal DUC (duc.v) turned off?

And RX Chain (0 to 4 possible)

  • Cordic for downconversion
  • CIC decimator per I- and Q-Stream
  • Halfbandfilter, after CIC, per I/Q-Stream

Also:
DDC not used? (I mean, ddc.v)
Low-pass decimation filter on AD-Chip disabled.

I wonder if http://gnuradio.org/trac/wiki/UsrpRfxDiagrams is still
correct.

Greetings
Dominik

On Tue, Aug 28, 2007 at 11:02:25PM +0200, Dominik A. wrote:

Cordic turned off, internal DUC (duc.v) turned off?
Correct.

And RX Chain (0 to 4 possible)

  • Cordic for downconversion
  • CIC decimator per I- and Q-Stream
  • Halfbandfilter, after CIC, per I/Q-Stream

The half-band is missing from the 4 DDC version because of resource
constraints.

Also:
DDC not used? (I mean, ddc.v)

Correct.

Low-pass decimation filter on AD-Chip disabled.

Correct.

I wonder if http://gnuradio.org/trac/wiki/UsrpRfxDiagrams is still correct.

yes, with the annotations.

Greetings
Dominik

Eric

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