attached is a somewhat larger patch for the FPGA firmware.
The patch changes the following:
stable timestamp, timestamp is latched on the last sample that goes
packet, so in case no overrun happens, timestamp goes up reliably 126
channel buffer is emptied when an overrun happens, avoids multiple
in short succession
tx timestamp wrap around, range is divided into 2^31 past and 2^31
dropped flag is set
overrun flag is set
tag is set to the tag of the last sent package
rssi value is transmitted in a logarithmic representation
waiting on fifos is shortened based on the fact that these get filled
emptied at a fixed rate. If the reader is faster than the writer, than
fifo should reach zero level when the reader finishes.
The patches have successfully been tested with 1tx1rx on usrp rev4.
works, overrun and underrun reporting works, drops are reported as well.