Firmware for USRP2 simulation testbench

Is there a firmware image optimized for the USRP2 simulation
testbench? The README in fpga/usrp2/testbench mentions an
eth_test.rom whose source doesn’t seem to be anywhere (except an old
snapshot of the repository in trac that Google finds).

From the verilog it seems you would want the hal_ routines to use the
UART for output, then do the magic write to 0xC2F0 in hal_finish(),
but hal_io.c only does the magic write in hal_finish when using the
dboard gpio pins for output. So maybe another hal option is needed?
It also seems like you could make a .rom that was much smaller for
simulation (simulating the loading of the 50+k of mostly dboard
related code into the RAM takes a while and isn’t really necessary
since the dboard isn’t simulated).

Just wanted to make sure I wouldn’t be reinventing the wheel before
embarking on writing my own firmware stuff for simulation…

Thanks,

Jared

On 04/02/2010 02:49 PM, Jared C. wrote:

Is there a firmware image optimized for the USRP2 simulation
testbench? The README in fpga/usrp2/testbench mentions an
eth_test.rom whose source doesn’t seem to be anywhere (except an old
snapshot of the repository in trac that Google finds).

You need to choose one which exercises what you want to test.
blink_leds is a good one to make sure everything is working.

Matt

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