Finding the USRP2's CPLD source code

Hi all,

I’m poking around the USRP2’s CPLD, the XC9572, mainly just to
understand
exactly how the U2 boots, and so looking for the Verilog source code
that
goes into the CPLD. I find usrp2/fpga/boot_cpld/boot_cpld.v, but this
file
has a comment that it is “only for u2_rev2,” and I’m using u2_rev3 like
most
others. usrp2/fpga/models/cpld_model.v looks promising too; any hints?

On 03/25/2010 04:20 AM, G Wildebeest wrote:

Hi all,

I’m poking around the USRP2’s CPLD, the XC9572, mainly just to
understand exactly how the U2 boots, and so looking for the Verilog
source code that goes into the CPLD. I find
usrp2/fpga/boot_cpld/boot_cpld.v, but this file has a comment that it is
“only for u2_rev2,” and I’m using u2_rev3 like most others.

This comment is old, and it meant “not for the rev 1”. So it works with
the rev2 (which was never sold) and the rev 3 and rev 4. boot_cpld.v is
the top level file, and it includes some of the files from
opencores/spi_boot

usrp2/fpga/models/cpld_model.v looks promising too; any hints?

That is a file used to model the CPLD in order to do simulations of the
FPGA. It is not compiled into the design itself.

Matt

This forum is not affiliated to the Ruby language, Ruby on Rails framework, nor any Ruby applications discussed here.

| Privacy Policy | Terms of Service | Remote Ruby Jobs