DPSK2 Demodulator


we are trying to use DPSK2 modulator and demodulator during our first
As far as we can see there is hardly any documentation available on

We would appreciate a few explaining words from somebody who knows how
configure the demodulator so that data is correctly received.
What synchronization method(s) is/are included?
Raised-cosine-filter for matched filtering seems to be included?

We tried like this with no success:
Sample/Symbol: 2
Excess BW: 0.35
GrayCode: YES
Verbose: OFF
Logging: OFF

Sample/Symbol: 2
Excess BW: 0.35
FLL Alpha: 0.01
Phase Alpha: 0.1
Timing Max D.: 1.5
Omega Relative Limit: 0.005
GrayCode: YES
Verbose: OFF
Logging: OFF
Sync Out: ON

Thanks in advance!

The source code is the best documentation. Look for the dqpsk2.py in the
blks2impl folder.

It uses a RRC for the matched filtering. I’m not sure about the
synchronization. But quickly looking at the code it seems the
demodulator uses a FLL for frequency recovery and a costas loop for fine
frequency recovery and phase recovery. Check gr_costas_loop_cc.cc and
fll_band_edge_cc.cc for more details. As for timing recovery I don’t
know what the pfb_clock_sync_ccf does. Check out

Hope this helps

On Wed, Jun 29, 2011 at 10:30 AM, Ralf [email protected] wrote:

Sample/Symbol: 2
Thanks in advance!

The DPSK2 blocks use a frequency locked loop (FLL), a polyphase timing
recovery loop, and a Costas loop for phase and residual frequency
Unfortunately, there are no magic numbers to use for these, but the
have worked well for me in the past.

I’ll point out that the FLL in particular still needs work. It can get
oscillations pretty easily, and if that happens, the rest of your
chain won’t work at all.

You can also turn on logging with --log to benchmark_rx.py, which dumps
pieces of the receiver chain to a file. You can then analyze the various
parts of the receive path to see where things start to go wrong.

An common problem with the digital modulation code is if the frequency
offset of the USRPs is too large between the TX and RX. It can be
outside of
the locking range and so never converge. To start with, it’s a good idea
transmit with one radio and look at the spectrum with your receiver
Figure out the frequency delta between the two and compensate for it. It
doesn’t have to be exact, but just enough to get you close.


I have a similar problem with the DPSK block.
I have to simulate a bpsk and I build the following scheme in grc:
-random source,
-packet encoder: bits/symbol=1, samples/symbol=4
-dpsk mod: type DBPSK, samples/symbol=4 and the other values as default
-multiply const: constant=3
-usrp sink: interpolation=int(128e6/samp_rate), freqency=2.45GHz and the
other values as default
-fft sink to see the spectrum output.
For the modulation I haven’t problem, I see the attachment mod_dpsk.png.

My problem is in the demodulator. The block are:
-usrp source: decimantion int(64e6/samp_rate) (samp_rate=250k, the same
in trasmitter), side=A, RXAntenna=RX
-DPSK demod: type=DBPSK, samples/sumbol=4, the other value as default
-packet decoder
-thottle with sample rate=250k
-fft to see the signal in frequency.

But the plot of fft doesn’t show anything.
Have I wrong the the choose of the block or the connection or the value
of the block?
I attach the file usrp_rx_dbsk.py generated.