Don't find some primitive

Hi, I finally managed to run ISE 10.1 on Linux to compile the raw
internet version of the fpga project,
but when I call ‘make bin’, the following error appears:

ERROR:HDLCompilers:87 - “…/…/…/fifo/fifo_2clock.v” line 26 Could not
find module/primitive ‘fifo_xlnx_2Kx36_2clk’

I checked in the makefile to be sure all is called well and the file
above is in there. Anybody know why?

Am I obligated to update to sp3?

Thx
Gabriel

On 02/16/2011 09:33 AM, Gabriel Morel wrote:

Am I obligated to update to sp3?
Yes. sp3 fixed some major bugs. However, that upgrade is not likely to
fix what you are seeing.

Once again, I STRONGLY suggest that you NOT use the raw ethernet
version, and use the new UHD version instead. There simply is no good
reason to stick with the raw ethernet version.

Matt

Where does one get the uhd version of the FPGA sources?

Nick

On 02/16/2011 09:45 AM, Nick O. wrote:

Where does one get the uhd version of the FPGA sources?

In either the uhd git tree or by getting the ise12 branch from the FPGA
git tree.

Matt

Hi,
we are doing some research here on decoding 802.11g using GNURadio. As
far as i know there is code available for transmission of 802.11g frames
on CGRAN but no receiver code. Is there any work going on for the
receiver side right now? Is it theoretically possible to decode a signal
received with the USRP N210? The bandwidth provided by the gigabit
ethernet connection should be sufficient in contrast to the USRP1 USB
connection, or am i wrong?

I had a look at the (generic) GNURadio OFDM mod/demod code but its kind
of hard to understand whats going on there. I have reused the
ofdm-sync-pm code to generate seemingly helpful frequency offset values
from the 802.11 short training sequence. I also extracted timing
information by correlating with the known short sequence. However i am
not sure if this synchronization is accurate enough for at least a few
fft blocks.

Is there anything like:

fine timing/frequency correction,
sampling offset correction,
channel estimation or
code for using pilot tone subcarriers

in the generic GNURadio ofdm implementation that could be reused for a
802.11g receiver? What is with the code for extracting infos from the
subcarriers? Would it be easier to rewrite it from scratch or can some
of the gnuradio code be reused?

Thanks for any information you can provide,
Thomas

On Wed, Feb 16, 2011 at 1:50 PM, Thomas N. [email protected]
wrote:

Hi,
we are doing some research here on decoding 802.11g using GNURadio. As far
as i know there is code available for transmission of 802.11g frames on
CGRAN but no receiver code. Is there any work going on for the receiver side
right now? Is it theoretically possible to decode a signal received with the
USRP N210? The bandwidth provided by the gigabit ethernet connection should
be sufficient in contrast to the USRP1 USB connection, or am i wrong?

Thomas,
Yes, the N210 will handle the bandwidth of 802.11g.

Yes, provided by the ofdm_sync block in ofdm_receiver.py.

sampling offset correction,

Yes, also provided by the ofdm_sync block in ofdm_receiver.py.

channel estimation or

Yes, in ofdm_frame_acq in ofdm_receiver.py.

code for using pilot tone subcarriers

No. That’s one of the biggest gaps in the current implementation.

in the generic GNURadio ofdm implementation that could be reused for a
802.11g receiver? What is with the code for extracting infos from the
subcarriers? Would it be easier to rewrite it from scratch or can some of
the gnuradio code be reused?

Thanks for any information you can provide,
Thomas

It should be a place to start, but it’ll probably take some work (though
hopefully less than starting from scratch). For getting the subcarriers,
you
probably want to look at the gr_ofdm_frame_sink block.

Tom

This is quick and off the top of the top of my head but here are some
clues:

1)The appropriate Makefile.srcs should call both
‘fifo_xlnx_2Kx36_2clk.v’ and '‘fifo_xlnx_2Kx36_2clk.xco’

  1. In the log (capture all ISE output to a file for review by
    redirecting STDOUT) you should see the following lines if you grep for
    fifo_xlnx_2Kx36_2clk:

Adding source to project:
/home/ianb/ettus/sram_fifo/fpgapriv/usrp2/coregen/fifo_xlnx_2Kx36_2clk.v

Adding source to project:
/home/ianb/ettus/sram_fifo/fpgapriv/usrp2/coregen/fifo_xlnx_2Kx36_2clk.xco
Compiling verilog file “…/…/…/coregen/fifo_xlnx_2Kx36_2clk.v” in
library work
Module <fifo_xlnx_2Kx36_2clk> compiled
Reading core <…/…/…/coregen/fifo_xlnx_2Kx36_2clk.ngc>.

  1. Coregen should automatically build this block from the spec in the
    .xco file to create the .ngc data read my ISE.
    You could try running coregen in the ‘coregen’ subdirectory to see if it
    can build it manually. Sometimes there can be issues with different
    versions of the FIFO generator tool included in ISE vs that specified in
    the .xco file.

Report back with grep output from your log if you can’t crack this.
-Ian

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