Details on the initialization sequence

I’m looking for details about the initialization process of the FPGA as
the order of lightsand their meanings. I studied the verilog files and
significance of signal configurations.

I think the CPLD program the FPGA and the FPGA turns on a light, the
configuration signal DONE at the end of the program process, but I don’t
know which light.

But for the second light, I think it’s the firmware that enables it.
The firmware is loaded from SD card by the FPGA after the DONE signals
goes high.

So when I program my bin file in the usrp2, a single light illuminates.
So I think my problem is not the bin file but the firmware. Is this

I will come back next week with more details. I will probe some pin and
via to really understand the order of some signals.